SLVSEW0A September 2020 – December 2020 TPSM41625
PRODUCTION DATA
The TPSM41625 device can be synchronized to an external clock. When synchronizing, the external clock signal must be applied to the SYNC pin before the device reaches its VIN UVLO threshold. In a stand-alone configuration, the external clock frequency must be within ±20% of the frequency set by the RRT resistor.
In stackable configuration: (see Section 7.3.7.1.1 for information on configuring the SYNC pins.)