SNVSBD0B December   2019  – September 2021 TPSM53602

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics (VIN = 5 V)
    7. 6.7 Typical Characteristics (VIN = 12 V)
    8. 6.8 Typical Characteristics (VIN = 24 V)
    9. 6.9 Typical Characteristics (VIN = 36 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Adjusting the Output Voltage
      2. 7.3.2  Switching Frequency
      3. 7.3.3  Input Capacitors
      4. 7.3.4  Output Capacitors
      5. 7.3.5  Output On/Off Enable (EN)
      6. 7.3.6  Programmable Undervoltage Lockout (UVLO)
      7. 7.3.7  Power Good (PGOOD)
      8. 7.3.8  Light Load Operation
      9. 7.3.9  Voltage Dropout
      10. 7.3.10 Overcurrent Protection (OCP)
      11. 7.3.11 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Active Mode
      2. 7.4.2 Auto Mode
      3. 7.4.3 Shutdown Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Output Voltage Setpoint
        3. 8.2.2.3 Input Capacitors
        4. 8.2.2.4 Output Capacitor Selection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
    3. 10.3 Theta JA versus PCB Area
    4. 10.4 Package Specifications
    5. 10.5 EMI
  11. 11Device and Documentation Support
    1. 11.1 Device Support
      1. 11.1.1 Third-Party Products Disclaimer
      2. 11.1.2 Development Support
        1. 11.1.2.1 Custom Design With WEBENCH® Tools
    2. 11.2 Documentation Support
      1. 11.2.1 Related Documentation
    3. 11.3 Receiving Notification of Documentation Updates
    4. 11.4 Support Resources
    5. 11.5 Trademarks
    6. 11.6 Electrostatic Discharge Caution
    7. 11.7 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 Input Capacitors

The TPSM53602 requires a minimum input capacitance of 20 μF (2 × 10 μF) of ceramic type. High-quality, ceramic-type X5R or X7R capacitors with sufficient voltage rating are recommended. TI recommends an additional 47 µF of non-ceramic capacitance for applications with transient load requirements. The voltage rating of input capacitors must be greater than the maximum input voltage.

Table 7-2 Recommended Input Capacitors
VENDOR(1)SERIESSIZEPART NUMBERCAPACITOR CHARACTERISTICS
VOLTAGE RATING
(V)		CAPACITANCE (3)
(µF)
MurataX5R1206GRT31CR61H106ME01L5010
TDKX5R1206CGA5L3X5R1H106M160AB5010
TDKX7R1206CGA5L1X7R1H106K160AC5010
MurataX7R1210GRM32ER71H106KA12L5010
TDKX7R1210C3225X7R1H106M250AC5010
(1) Capacitor Supplier Verification, RoHS, Lead-free, and Material Details
Consult capacitor suppliers regarding availability, material composition, RoHS and lead-free status, and manufacturing process requirements for any capacitors identified in this table.
(2) Maximum ESR at 100 kHz, 25°C.
(3) Standard capacitance values