SLVSGJ5 April 2022 TPSM63604
PRODUCTION DATA
Table 9-1 shows the intended input, output, and performance parameters for this application example. Note that if the input voltage decreases below approximately 5.5 V, the regulator operates in dropout with the output voltage below its 5-V setpoint.
Design Parameter | Value |
---|---|
Input voltage range | 9 V to 36 V |
Input voltage UVLO turn on, off | 6 V, 4.3 V |
Output voltage | 5 V |
Maximum output current | 4 A |
Switching frequency | 1 MHz |
Output voltage regulation | ±1% |
Module shutdown current | < 1 µA |
Table 9-2 gives the selected buck module power-stage components with availability from multiple vendors. This design uses an all-ceramic output capacitor implementation.
Reference Designator | Qty | Specification | Manufacturer(1) | Part Number |
---|---|---|---|---|
CIN1, CIN2 | 2 | 10 µF, 50 V, X7R, 1210, ceramic | Taiyo Yuden | UMJ325KB7106KMHT |
TDK | CNA6P1X7R1H106K | |||
10 µF, 50 V, X7S, 1210, ceramic | Murata | GCM32EC71H106KA03 | ||
TDK | CGA6P3X7S1H106M | |||
COUT1, COUT2 | 2 | 47 µF, 6.3 V, X7R, 1210, ceramic | Murata | GRM32ER70J476ME20K |
AVX | 12106C476MAT2A | |||
47 µF, 10 V, X7R, 1210, ceramic | Murata | GRM32ER71A476ME15L | ||
AVX | 1210ZC476MAT2A | |||
100 µF, 6.3 V, X7S, 1210, ceramic | Murata | GRM32EC70J107ME15L | ||
U1 | 1 | TPSM63604 36-V, 4-A synchronous buck module | Texas Instruments | TPSM63604RDLR |
More generally, the TPSM63604 module is designed to operate with a wide range of external components and system parameters. However, the integrated loop compensation is optimized for a certain range of output capacitance.