SLVSGJ8 April 2022 TPSM63606E
PRODUCTION DATA
The TPSM63606E has an adjustable output voltage range from 1 V up to a maximum of 16 V or slightly less than VIN, whichever is lower. Setting the output voltage requires two feedback resistors, designated as RFBT and RFBB in Figure 8-1. The reference voltage at the FB pin is set at 1 V with a feedback system accuracy over the full junction temperature range of ±1%. The junction temperature range for the device is –55°C to 125°C.
Calculate the value for RFBT using Equation 1 based on a recommended value for RFBB of 10 kΩ.
Table 8-1 lists the standard resistor values for several output voltages and the recommended switching frequency range to maintain reasonable peak-to-peak inductor ripple current. This table also includes the minimum required output capacitance for each output voltage setting to maintain stability. The capacitances as listed represent effective values for ceramic capacitors derated for DC bias voltage and temperature. Furthermore, place a feedforward capacitor, CFF, in parallel with RFBT to increase the phase margin when the output capacitance is close to the minimum recommended value.
VOUT (V) | RFBT (kΩ) (1) | Suggested FSW Range (kHz) | COUT(min) (µF) (Effective) | CFF (pF) | VOUT (V) | RFBT (kΩ) (1) | Suggested FSW Range (MHz) | COUT(min) (µF) (Effective) | CFF (pF) | |
---|---|---|---|---|---|---|---|---|---|---|
1 | Short | 300 to 500 | 300 | — | 5 | 40.2 | 0.8 to 1.2 | 30 | 22 | |
1.2 | 2 | 400 to 600 | 200 | — | 7.5 | 64.9 | 1.2 to 1.6 | 25 | 15 | |
1.8 | 8.06 | 500 to 700 | 120 | 100 | 10 | 90.9 | 1.6 to 2.0 | 18 | — | |
2.5 | 15 | 650 to 900 | 70 | 68 | 12 | 110 | 1.7 to 2.2 | 12 | — | |
3.3 | 23.2 | 700 to 950 | 50 | 47 | 15 | 140 | 1.8 to 2.2 | 10 | — |
Note that higher feedback resistances consume less DC current. However, an upper RFBT resistor value higher than 1 MΩ renders the feedback path more susceptible to noise. Higher feedback resistances generally require more careful layout of the feedback path. It is important to locate the feedback resistors close to the FB and AGND pins, keeping the feedback trace as short as possible (and away from noisy areas of the PCB). See Section 11.2 guidelines for more detail.