SLVSH65A February   2023  – November 2023 TPSM63610E

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 System Characteristics
    7. 7.7 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Input Voltage Range (VIN1, VIN2)
      2. 8.3.2  Adjustable Output Voltage (FB)
      3. 8.3.3  Input Capacitors
      4. 8.3.4  Output Capacitors
      5. 8.3.5  Switching Frequency (RT)
      6. 8.3.6  Precision Enable and Input Voltage UVLO (EN)
      7. 8.3.7  Frequency Synchronization (SYNC/MODE)
      8. 8.3.8  Spread Spectrum
      9. 8.3.9  Power-Good Monitor (PG)
      10. 8.3.10 Adjustable Switch-Node Slew Rate (RBOOT, CBOOT)
      11. 8.3.11 Bias Supply Regulator (VCC, VLDOIN)
      12. 8.3.12 Overcurrent Protection (OCP)
      13. 8.3.13 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Shutdown Mode
      2. 8.4.2 Standby Mode
      3. 8.4.3 Active Mode
  10. 9 Applications and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design 1 – High-Efficiency 8-A (10-A peak) Synchronous Buck Regulator for Industrial Applications
        1. 9.2.1.1 Design Requirements
        2. 9.2.1.2 Detailed Design Procedure
          1. 9.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 9.2.1.2.2 Output Voltage Setpoint
          3. 9.2.1.2.3 Switching Frequency Selection
          4. 9.2.1.2.4 Input Capacitor Selection
          5. 9.2.1.2.5 Output Capacitor Selection
          6. 9.2.1.2.6 Other Connections
        3. 9.2.1.3 Application Curves
      2. 9.2.2 Design 2 – Inverting Buck-Boost Regulator with Negative Output Voltage
        1. 9.2.2.1 Design Requirements
        2. 9.2.2.2 Detailed Design Procedure
          1. 9.2.2.2.1 Output Voltage Setpoint
          2. 9.2.2.2.2 IBB Maximum Output Current
          3. 9.2.2.2.3 Switching Frequency Selection
          4. 9.2.2.2.4 Input Capacitor Selection
          5. 9.2.2.2.5 Output Capacitor Selection
          6. 9.2.2.2.6 Other Considerations
        3. 9.2.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
        1. 9.4.1.1 Thermal Design and Layout
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Development Support
        1. 10.1.2.1 Custom Design With WEBENCH® Tools
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.1.3 Application Curves

Unless otherwise indicated, VIN = 24 V, VOUT = 5 V, IOUT = 8 A, and FSW = 1 MHz.

GUID-20220815-SS0I-WMK8-R95P-R1QWHPR590DD-low.svg
VOUT = 5 V FPWM mode FSW = 1 MHz
Figure 9-2 Efficiency for VOUT = 5 V
GUID-20220815-SS0I-9QG7-HMSW-QLVF0DKRG10C-low.svg
VOUT = 5 V FPWM mode FSW = 1 MHz
Figure 9-4 Load Regulation for VOUT = 5 V
GUID-20220816-SS0I-NPK8-ZS37-2ZH8SJFH5JWC-low.svg
VIN = 24 V IOUT = 6 A FSW = 1 MHz
Figure 9-6 Start-up
GUID-20220816-SS0I-GW77-55XX-DHZRWTCRKG7H-low.svg
VOUT = 5 V FPWM mode FSW = 1 MHz
TR = TF = 4 µs VIN = 24 V Slew rate = 1 A/µs
Figure 9-8 Load Transient, 0 A to 4 A, 1 A/µs
GUID-20221014-SS0I-QHPC-V7V5-L0PLDRX5GXTN-low.svg
Default EVM VOUT = 5 V FSW = 1 MHz
Figure 9-10 CISPR 11/32 Class B Conducted Emissions: VIN = 24 V, SPSP ON
GUID-20221014-SS0I-M8GH-XX1D-RRRMWLWPFJ0V-low.svg
Additional 2 x 10pF CIN with EMI filter removed VOUT = 5 V FSW = 1 MHz
Figure 9-12 CISPR 11 Class B Radiated Emissions: VIN = 24 V, SPSP ON
GUID-20220815-SS0I-XGXV-V6BT-FZ19LLSJQ19W-low.svg
VOUT = 5 V Auto mode FSW = 1 MHz
Figure 9-3 Efficiency for VOUT = 5 V
GUID-20220815-SS0I-WDHJ-JDQS-DK68WFLBX1BF-low.svg
VOUT = 5 V Auto mode FSW = 1 MHz
Figure 9-5 Load Regulation for VOUT = 5 V
GUID-20220816-SS0I-DZMW-Z3PB-LF2NCWTL5CKF-low.svg
VOUT = 5 V FPWM mode FSW = 1 MHz
TR= TF = 4 µs VIN = 24 V Slew rate = 1 A/µs
Figure 9-7 Load Transient, 4 A to 8 A, 1 A/µs
GUID-20220816-SS0I-XJ1B-6WJZ-C9W83SZV0GNL-low.svg
VOUT = 5 V FSW = 1 MHz
Figure 9-9 Start-up into Short Circuit
GUID-20221014-SS0I-2L4C-RM04-QJRMRLGSWTXN-low.svg
Default EVM VOUT = 5 V FSW = 1 MHz
Figure 9-11 CISPR 11/32 Class B Conducted Emissions: VIN = 24 V, SPSP OFF
GUID-20221014-SS0I-KZSQ-LWPW-S6WX5NJFZGD0-low.svg
Additional 2 x 10pF CIN with EMI filter removed VOUT = 5 V FSW = 1 MHz
Figure 9-13 CISPR 11 Class B Radiated Emissions: VIN = 24 V, SPSP OFF