SLVSHL0B June 2024 – July 2024 TPSM81033
ADVANCE INFORMATION
When the input voltage is higher than the setting output voltage, the output voltage is higher than the target regulation voltage, the device works in pass-through mode. When the output voltage is 101% of the setting target voltage, the TPSM81033 stops switching and fully turns on the high-side PMOS FET. The output voltage is the input voltage minus the voltage drop across the DCR of the inductor and the RDS(on) of the PMOS FET. When the output voltage drops below the 97% of the setting target voltage as the input voltage declines or the load current increases, the TPSM81033 resumes switching again to regulate the output voltage.