SLVSHG7A September 2024 – November 2024 TPSM82843
PRODUCTION DATA
The pinout of TPSM82843 has been designed to enable a single top layer PCB routing of the IC and the critical passive components such as CIN, COUT, and VSET resistor. Furthermore, this pinout allows the user to connect tiny components such as 0201 (0603 metric) size capacitors and resistors. As for all switching power supplies, the layout is an important step in the design. Care must be taken in board layout to get the specified performance. Providing a low inductance, low impedance ground path is critical. Therefore, use wide and short traces for the main current paths. Place the input capacitor as close as possible to the VIN of the IC and GND pins. This placement is the most critical component placement. Then place the output capacitor without via as close as possible to the VOUT and GND pin as shown in the following layout diagram. The VOS line is a sensitive, high impedance input and must be connected to the output capacitor with a direct trace from the output capacitor solder pad to the device pin. The VOS line must stay away from noisy components and traces (for example, the SW line) or other noise sources. For bode measurements in the evaluation board, a via is placed on the trace to allow connection of a 10Ohm resistor between the capacitor pad and VOS on the bottom side of the PCB. The connection between capacitor pad and via must be cut for this measurement. For the final circuit, no vias can be present and all capacitors must be placed on the top layer.