SLUSF35 November   2023 TPSM828510 , TPSM828511 , TPSM828512

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  8. 7 Parameter Measurement Information
    1. 7.1 Schematic
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Precise Enable (EN)
      2. 8.3.2 MODE/SYNC
      3. 8.3.3 Undervoltage Lockout (UVLO)
      4. 8.3.4 Power-Good Output (PG)
      5. 8.3.5 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pulse Width Modulation (PWM) Operation
      2. 8.4.2 Power Save Mode Operation (PFM/PWM)
      3. 8.4.3 100% Duty-Cycle Operation
      4. 8.4.4 Current Limit and Short-Circuit Protection
      5. 8.4.5 Output Discharge
      6. 8.4.6 Soft Start / Tracking (SS/TR)
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Programming the Output Voltage
        2. 9.2.2.2 Feedforward Capacitor
        3. 9.2.2.3 Input Capacitor
        4. 9.2.2.4 Output Capacitor
        5. 9.2.2.5 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Voltage Tracking
      2. 9.3.2 Synchronizing to an External Clock
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
        1. 9.5.2.1 Thermal Consideration
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.3 100% Duty-Cycle Operation

The duty cycle of a buck converter operated in PWM mode is given as D = VOUT / VIN. The duty cycle increases as the input voltage comes close to the output voltage and the off-time gets smaller. When the minimum off-time of typically 10 ns is reached, the TPSM82851x skips switching cycles while approaching 100% mode. In 100% mode, the device keeps the high-side switch on continuously. The high-side switch stays turned on as long as the output voltage is below the target. This feature is particularly useful in battery-powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage to maintain a minimum output voltage is given by:

Equation 1. V I N m i n = V O U T m i n + I O U T m i n × R D P

where

  • RDP is the resistance from VIN to VOUT, which includes the high-side MOSFET on-resistance and DC resistance of the inductor.
  • VOUT(min) is the minimum output voltage the load can accept.