SLVSGS7D July   2023  – June 2024 TPSM8287A06 , TPSM8287A10 , TPSM8287A12 , TPSM8287A15

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 I2C Interface Timing Characteristics
    7. 6.7 Typical Characteristics
  8. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Fixed-Frequency DCS-Control Topology
      2. 7.3.2  Forced-PWM and Power-Save Modes
      3. 7.3.3  Precise Enable
      4. 7.3.4  Start-Up
      5. 7.3.5  Switching Frequency Selection
      6. 7.3.6  Output Voltage Setting
        1. 7.3.6.1 Output Voltage Setpoint
        2. 7.3.6.2 Output Voltage Range
        3. 7.3.6.3 Non-Default Output Voltage Setpoint
        4. 7.3.6.4 Dynamic Voltage Scaling (DVS)
      7. 7.3.7  Compensation (COMP)
      8. 7.3.8  Mode Selection / Clock Synchronization (MODE/SYNC)
      9. 7.3.9  Spread Spectrum Clocking (SSC)
      10. 7.3.10 Output Discharge
      11. 7.3.11 Undervoltage Lockout (UVLO)
      12. 7.3.12 Overvoltage Lockout (OVLO)
      13. 7.3.13 Overcurrent Protection
        1. 7.3.13.1 Cycle-by-Cycle Current Limiting
        2. 7.3.13.2 Hiccup Mode
        3. 7.3.13.3 Current-Limit Mode
      14. 7.3.14 Power Good (PG)
        1. 7.3.14.1 Power-Good Standalone, Primary Device Behavior
        2. 7.3.14.2 Power-Good Secondary Device Behavior
      15. 7.3.15 Remote Sense
      16. 7.3.16 Thermal Warning and Shutdown
      17. 7.3.17 Stacked Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset (POR)
      2. 7.4.2 Undervoltage Lockout
      3. 7.4.3 Standby
      4. 7.4.4 On
    5. 7.5 Programming
      1. 7.5.1 Serial Interface Description
      2. 7.5.2 Standard-, Fast-, Fast-Mode Plus Protocol
      3. 7.5.3 I2C Update Sequence
      4. 7.5.4 I2C Register Reset
  9. Device Registers
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Selecting the Input Capacitors
        2. 9.2.2.2 Selecting the Target Loop Bandwidth
        3. 9.2.2.3 Selecting the Compensation Resistor
        4. 9.2.2.4 Selecting the Output Capacitors
        5. 9.2.2.5 Selecting the Compensation Capacitor, CComp1
        6. 9.2.2.6 Selecting the Compensation Capacitor, CComp2
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application Using Four TPSM8287Axx in Parallel Operation
      1. 9.3.1 Design Requirements
      2. 9.3.2 Detailed Design Procedure
        1. 9.3.2.1 Selecting the Input Capacitors
        2. 9.3.2.2 Selecting the Target Loop Bandwidth
        3. 9.3.2.3 Selecting the Compensation Resistor
        4. 9.3.2.4 Selecting the Output Capacitors
        5. 9.3.2.5 Selecting the Compensation Capacitor, CComp1
        6. 9.3.2.6 Selecting the Compensation Capacitor, CComp2
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Design Requirements

Table 9-4 lists the operating parameters for this application example with four TPSM8287A12BAS devices working in parallel to increase the output current.

Table 9-4 Design Parameters
SYMBOLPARAMETERVALUE
VINInput voltage2.7 – 6.0 V
VOUTOutput voltage0.60 V
TOLVOUTOutput voltage tolerance allowed by the application±3.3 %
TOLDCOutput voltage tolerance of the TPSM8287A12BAS (DC accuracy)±0.8 %
ΔIOUT(step)Output current load step±30.0 A
ttLoad step transition time1 μs
fSWSwitching frequency1.5 MHz
LIntegrated inductor100 nH
TOLINDIntegrated inductor tolerance±20 %
gmError amplifier transconductance1.5 mS
τEmulated current time constant12.5 μs
TOLτTolerance of the emulated current time constant±30 %
BWτTarget loop bandwidth

375 kHz

NΦNumber of paralleled devices (phases)

4

Preliminary Calculations

The maximum allowable deviation of the power supply is ±3.3%. The DC accuracy of the TPSM8287Axx is specified as ±0.8%, and therefore the maximum output voltage variation during a transient is given by:

Equation 34. VOUT=±VOUT×(TOLVOUTTOLDC)
Equation 35. VOUT=±VOUT×(3.3% 0.8%)=±15 mV

Equation 36 computes the peak-to-peak inductor current ripple, which is the greatest at the maximum input voltage:

Equation 36. IL(PP)=VOUTVIN(max)VIN(max)  VOUTL×fsw×
Equation 37. IL(PP)=0.66.06.0 0.6100×109×1.5×106×4=0.9 A

The maximum load step occurs when the load step from the application occurs at exactly the same time as the peak (or trough) of the inductor ripple current, and is given by:

Equation 38. IOUT(max)=IOUT(step)+IL(PP)2
Equation 39. IOUT(max)=30.0+0.92=30.5 A