SLVSG68 November 2022 TPSM82901
PRODUCTION DATA
If the device is configured to VSET operation, VO is sensed only through the internal VOS connection by an internal resistor divider. The target VO is programmed by an external resistor connected between the VSET pin and GND. Figure 7-3 shows the typical schematic for this configuration.
# | Resistor Value [Ω] | Target VO [V] |
---|---|---|
1 | GND | 1.2 |
2 | 4.64 k | 0.4 |
3 | 5.76 k | 0.6 |
4 | 7.15 k | 0.8 |
5 | 8.87 k | 1.0 |
6 | 11.0 k | 1.1 |
7 | 13.7 k | 1.3 |
8 | 16.9 k | 1.35 |
9 | 21.0 k | 1.8 |
10 | 26.1 k | 1.9 |
11 | 40.2 k | 2.5 |
12 | 61.9 k | 3.8 |
13 | 76.8 k | 5.0 |
14 | 95.3 k | 5.1 |
15 | 118.0 k | 5.5 |
16 | 249.00 k or larger/Open | 3.3 |