SLVSG68 November   2022 TPSM82901

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Mode Selection and Device Configuration (MODE/S-CONF)
      2. 7.3.2 Adjustable VO Operation (External Voltage Divider)
      3. 7.3.3 Setable VO Operation (VSET and Internal Voltage Divider)
      4. 7.3.4 Soft Start/Tracking (SS/TR)
      5. 7.3.5 Smart Enable with Precise Threshold
      6. 7.3.6 Power Good (PG)
      7. 7.3.7 Undervoltage Lockout (UVLO)
      8. 7.3.8 Current Limit And Short Circuit Protection
      9. 7.3.9 Thermal Shutdown
    4. 7.4 Device Functional Modes
      1. 7.4.1 Pulse Width Modulation (PWM) Operation
      2. 7.4.2 AEE (Automatic Efficiency Enhancement)
      3. 7.4.3 Power Save Mode Operation (Auto PFM/PWM)
      4. 7.4.4 100% Duty-Cycle Operation
      5. 7.4.5 Output Discharge Function
      6. 7.4.6 Starting into a Pre-Biased Load
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application with Adjustable Output Voltage
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Custom Design With WEBENCH® Tools
        2. 8.2.2.2 Programming the Output Voltage
        3. 8.2.2.3 Capacitor Selection
          1. 8.2.2.3.1 Output Capacitor
          2. 8.2.2.3.2 Input Capacitor
          3. 8.2.2.3.3 Soft-Start Capacitor
        4. 8.2.2.4 Tracking Function
      3. 8.2.3 Application Curves
    3. 8.3 Typical Application with Setable VO Using VSET
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
      3. 8.3.3 Application Curves
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
        1. 8.5.2.1 Thermal Considerations
  9. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Third-Party Products Disclaimer
      2. 9.1.2 Development Support
        1. 9.1.2.1 Custom Design With WEBENCH® Tools
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.2 AEE (Automatic Efficiency Enhancement)

When the MODE/S-CONF pin is configured for AEE mode, the TPSM82901 provides the highest efficiency over the entire input voltage and output voltage range by automatically adjusting the switching frequency of the converter. This is achieved by setting the predictive off time of the converter. The efficiency of a switched mode converter is determined by the power losses during the conversion. The efficiency decreases if VOUT decreases, VIN increases as shown in Equation 4, or both. In order to keep the efficiency high over the entire duty cycle range (VOUT/VIN ratio), the switching frequency is adjusted while maintaining the ripple current.

Equation 4. GUID-7B677B9E-5A26-43BC-89E4-3D15EABE1AEB-low.gif

The AEE function in the TPSM82901 adjusts the on time (TON) in power save mode, depending on the input voltage and the output voltage to maintain highest efficiency. The on time in steady-state operation can be estimated as using Equation 5:

Equation 5. GUID-15840F58-055F-4AB6-A742-CAD8489F6EFA-low.gif

Equation 6 shows the relationship among the inductor ripple current, switching frequency, and duty cycle.

Equation 6. GUID-2662A6C3-169A-4E21-B734-D8DE0DA94C0C-low.gif

Efficiency increases by decreasing switching losses and preserving high efficiency for varying duty cycles, while the ripple current amplitude remains low enough to deliver the full output current without reaching current limit. The AEE feature provides an efficiency enhancement for various duty cycles, especially for lower VOUT values where fixed frequency converters suffer from a significant efficiency drop. Furthermore, this feature compensates for the very small duty cycles of high VIN to low VOUT conversion, which limits the control range in other topologies.