SLUSDC9A August   2018  – June 2021 TPSM831D31

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  References: DAC
    7. 6.7  Telemetry
    8. 6.8  Current Sense and Calibration
    9. 6.9  Logic Interface Pins: A_EN, A_PGOOD, B_EN, B_PGOOD,RESET
    10. 6.10 Protections: OVP and UVP
    11. 6.11 Typical Characteristics (VIN = 12 V)
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 DCAP+ Control
      2. 7.3.2 Setting the Load-Line (DROOP)
      3. 7.3.3 Start-Up Timing
      4. 7.3.4 Load Transitions
      5. 7.3.5 Switching Frequency
      6. 7.3.6 RESET Function
      7. 7.3.7 VID Table
    4. 7.4 Device Functional Modes
      1. 7.4.1 Continuous Conduction Mode
      2. 7.4.2 Operation With EN Signal Control
      3. 7.4.3 Operation With OPERATION Control
      4. 7.4.4 Operation With EN and OPERATION Control
    5. 7.5 Programming
      1. 7.5.1  PMBus Connections
      2. 7.5.2  PMBus Address Selection
      3. 7.5.3  Supported Commands
      4. 7.5.4  Commonly Used PMBus Commands
      5. 7.5.5  Voltage, Current, Power, and Temperature Readings
        1. 7.5.5.1 (88h) READ_VIN
        2. 7.5.5.2 (89h) READ_IIN
        3. 7.5.5.3 (8Bh) READ_VOUT
        4. 7.5.5.4 (8Ch) READ_IOUT
        5. 7.5.5.5 (8Dh) READ_TEMPERATURE_1
        6. 7.5.5.6 (96h) READ_POUT
        7. 7.5.5.7 (97h) READ_PIN
        8. 7.5.5.8 (D4h) MFR_SPECIFIC_04
      6. 7.5.6  Output Current Sense and Calibration
        1. 7.5.6.1 Reading Individual Phase Currents
          1. 7.5.6.1.1 Reading Total Current
          2. 7.5.6.1.2 51
      7. 7.5.7  Output Voltage Margin Testing
        1. 7.5.7.1 (01h) OPERATION
        2. 7.5.7.2 (26h) VOUT_MARGIN_LOW
        3. 7.5.7.3 (25h) VOUT_MARGIN_HIGH
      8. 7.5.8  Loop Compensation
        1. 7.5.8.1 (D7h) MFR_SPECIFIC_07
        2. 7.5.8.2 (28h) VOUT_DROOP
      9. 7.5.9  Converter Protection and Response
      10. 7.5.10 Output Overvoltage Protection and Response
        1. 7.5.10.1 (40h) VOUT_OV_FAULT_LIMIT
        2. 7.5.10.2 (41h) VOUT_OV_FAULT_RESPONSE
      11. 7.5.11 Maximum Allowed Output Voltage Setting
        1. 7.5.11.1 (24h) VOUT_MAX
      12. 7.5.12 Output Undervoltage Protection and Response
        1. 7.5.12.1 (44h) VOUT_UV_FAULT_LIMIT
        2. 7.5.12.2 (45h) VOUT_UV_FAULT_RESPONSE
      13. 7.5.13 Minimum Allowed Output Voltage Setting
        1. 7.5.13.1 (2Bh) VOUT_MIN
      14. 7.5.14 Output Overcurrent Protection and Response
        1. 7.5.14.1 (46h) IOUT_OC_FAULT_LIMIT
        2. 7.5.14.2 (4Ah) IOUT_OC_WARN_LIMIT
        3. 7.5.14.3 (47h) IOUT_OC_FAULT_RESPONSE
        4. 7.5.14.4 Per Phase Overcurrent Limit Thresholds
      15. 7.5.15 Input Under-Voltage Lockout (UVLO)
        1. 7.5.15.1 (35h) VIN_ON
      16. 7.5.16 Input Over-Voltage Protection and Response
        1. 7.5.16.1 (55h) VIN_OV_FAULT_LIMIT
        2. 7.5.16.2 (56h) VIN_OV_FAULT_RESPONSE
      17. 7.5.17 Input Undervoltage Protection and Response
        1. 7.5.17.1 (59h) VIN_UV_FAULT_LIMIT
        2. 7.5.17.2 (5Ah) VIN_UV_FAULT_RESPONSE
      18. 7.5.18 Input Overcurrent Protection and Response
        1. 7.5.18.1 (5Bh) IIN_OC_FAULT_LIMIT
        2. 7.5.18.2 (5Dh) IIN_OC_WARN_LIMIT
        3. 7.5.18.3 (5Ch) IIN_OC_FAULT_RESPONSE
      19. 7.5.19 Overtemperature Protection and Response
        1. 7.5.19.1 (4Fh) OT_FAULT_LIMIT
        2. 7.5.19.2 (51h) OT_WARN_LIMIT
        3. 7.5.19.3 (50h) OT_FAULT_RESPONSE
      20. 7.5.20 Dynamic Phase Shedding (DPS)
        1. 7.5.20.1 (DEh) MFR_SPECIFIC_14
        2. 7.5.20.2 (DFh) MFR_SPECIFIC_15
      21. 7.5.21 NVM Programming
      22. 7.5.22 NVM Security
        1. 7.5.22.1 (FAh) MFR_SPECIFIC_42
      23. 7.5.23 Black Box Recording
        1. 7.5.23.1 (D8h) MFR_SPECIFIC_08
      24. 7.5.24 Board Identification and Inventory Tracking
      25. 7.5.25 Status Reporting
        1. 7.5.25.1 (78h) STATUS_BYTE
        2. 7.5.25.2 (79h) STATUS_WORD
        3. 7.5.25.3 (7Ah) STATUS_VOUT
        4. 7.5.25.4 (7Bh) STATUS_IOUT
        5. 7.5.25.5 (7Ch) STATUS_INPUT
        6. 7.5.25.6 (7Dh) STATUS_TEMPERATURE
        7. 7.5.25.7 (7Eh) STATUS_CML
        8. 7.5.25.8 (80h) STATUS_MFR_SPECIFIC
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Capacitors
        2. 8.2.2.2 Output Capacitors
        3. 8.2.2.3 Switching Frequency
        4. 8.2.2.4 Set PMBus Address
        5. 8.2.2.5 PMBus GUI Default Values
      3. 8.2.3 Application Performance Plots
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • MOA|28
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

TA = –40°C to +105°C, VIN = 12 V, VOUTA = VAVSP = 1 V, VOUTB = VBVSP = 1 V, VAVSN = VBVSN = 0V, IOUTA = IOUTB = 0 A, FSW = 400 kHz, CIN1 = 24 × 22-µF, 25-V, 1210 ceramic, CIN2 = 2 × 470 µF, electrolytic bulk, COUTA1 = 12 × 100 µF, 6.3-V, 1210 ceramic, COUTA2 = 12 × 470 µF, 6.3 V, COUTB1 = 4 × 100 µF, 6.3-V, 1210 ceramic, COUTB2 = 4 × 470 µF, 6.3-V polymer bulk. Minimum and maximum limits are specified through production test or design of the module/internal controller. Typical values represent the most likely parametric norm and are provided for reference only (unless otherwise noted).
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
INPUT VOLTAGE
VIN Input voltage range 8 14 V
UVLO VIN undervoltage lockout VIN increasing (default setting) 7.25 V
VIN decreasing (default setting) 6.5 V
IIN(STBY) Input standby current A_EN = B_EN = GND 8 mA
OUTPUT VOLTAGE
VOUT_A Boot voltage 5-mV DAC (default setting) 0.492 0.5 0.508 V
Programmable range 5-mV DAC 0.25 1.52 V
Programmable step size 5-mV DAC 5 mV
Set-point voltage tolerance 5-mV DAC, 0.8 V ≤ VOUT ≤ 1 V –0.5% 0.5%
Line regulation 8 V ≤ VIN ≤ 14 V, IOUT = 0 A 0.1%
Load regulation 0 A ≤ IOUT ≤ 120 A 0.1%
Output voltage ripple 20-MHz bandwidth, IOUT = 90 A 10 mV
VOUT_B Boot voltage 5-mV DAC (default setting) 0.492 0.5 0.508 V
Programmable range 5-mV DAC 0.25 1.52 V
Programmable step size 5-mV DAC 5 mV
Set-point voltage tolerance 5-mV DAC, 0.8 V ≤ VOUT ≤ 1 V –0.5% 0.5%
Line regulation 8 V ≤ VIN ≤ 14 V, IOUT = 0 A 0.1%
Load regulation 0 A ≤ IOUT ≤ 120 A 0.1%
Output voltage ripple 20-MHz bandwidth, IOUT = 30 A 20 mV
OUTPUT CURRENT
IOUT_A Output current Natural convection(2) 0 120 A
Overcurrent fault threshold Factory default setting (150% of IOUT max) 180 A
Per phase OCL level (default setting) 54 A
Overcurrent warning threshold Factory default setting (100% of IOUT max) 120 A
IOUT_B Output current Natural convection(2) 0 40 A
Overcurrent fault threshold Factory default setting (150% of IOUT max) 60 A
Per Phase OCL level (default setting) 54 A
Overcurrent warning threshold Factory default setting (100% of IOUT max) 40 A
PERFORMANCE
Efficiency(1) IOUT_A = 90 A, VOUT_B disabled 92%
IOUT_B = 30 A, VOUT_A = disabled 92%
TIMING
tSTARTUPA VOUTA start-up time VVBOOT > 0 V, no faults, TON_DELAY = 0xB1EC (PAGE 0) (default setting) 0.38 0.48 0.58 ms
tSTARTUPB VOUTB start-up time VVBOOT > 0 V, no faults, TON_DELAY = 0xB396 (PAGE 1) (default setting) 0.8 0.9 1 ms
tVCCVID VID change to VSP change ACK of SetVID_x command to start of voltage ramp 500 ns
tON_BLANK Rising-edge blanking time(3) MFR_SPEC_09<8:6> = 110b
(default setting)		 53 72 92 ns
SLSET Slew rate setting(3) VOUT_TRANSITION_RATE = 0xE028 (default setting) 2.5 mV/µs
SLSS AVSP and BVSP slew rate soft-start(3) MFR_SPEC_13<8> = 0b (default setting) SLSET /4 mV/µs
SWITCHING FREQUENCY
fSW Switching frequency FREQUENCY_SWITCH = 0x0190 (VOUTA default setting) 360 400 440 kHz
FREQUENCY_SWITCH = 0x01C2 (VOUTB default setting) 405 450 495 kHz
Range(3) 350 700 kHz
(1) Phase shedding disabled.
(2) See SOA graph for derating over temperature.
(3) Applies to both VOUTA and VOUTB.