SLLS808A JULY 2007 – November 2016 TRS202
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
For proper operation, add capacitors as shown in Figure 12. Pins 9 through 12 connect to UART or general purpose logic lines. RS-232 lines on pins 7, 8, 13, and 14 connect to a connector or cable.
The capacitor type used for C1–C4 is not critical for proper operation. The TRS202 requires 0.1-µF capacitors, although capacitors up to 10 µF can be used without harm. Ceramic dielectrics are suggested for the 0.1-µF capacitors. When using the minimum recommended capacitor values, make sure the capacitance value does not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (for example, 2×) nominal value. The capacitors' effective series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V–.
Use larger capacitors (up to 10 µF) to reduce the output impedance at V+ and V–.
Bypass VCC to ground with at least 0.1 µF. In applications sensitive to power-supply noise generated by the charge pumps, decouple VCC to ground with a capacitor the same size as (or larger than) the charge-pump capacitors (C1 to C4).
TI TRS202 devices have standard ESD protection structures incorporated on the pins to protect against electrostatic discharges encountered during assembly and handling. In addition, the RS232 bus pins (driver outputs and receiver inputs) of these devices have an extra level of ESD protection. Advanced ESD structures were designed to successfully protect these bus pins against ESD discharge of ±15 kV when powered down.
Stringent ESD testing is performed by TI, based on various conditions and procedures. Contact TI for a reliability report that documents test setup, methodology, and results.
The HBM of ESD testing is shown in Figure 10. Figure 11 shows the current waveform that is generated during a discharge into a low impedance. The model consists of a 100-pF capacitor, charged to the ESD voltage of concern, and subsequently discharged into the device under test (DUT) through a 1.5-kΩ resistor.
Two driver and two receiver channels are supported for full duplex transmission with hardware flow control. The two 5-kΩ resistors are internal to the TRS202.
The capacitor type used for C1 through C4 is not critical for proper operation. The TRS202 requires 0.1-µF capacitors. Capacitors up to 10 µF can be used without harm. Ceramic dielectrics are suggested for the 0.1-µF capacitors. When using the minimum recommended capacitor values, make sure the capacitance value does not degrade excessively as the operating temperature varies. If in doubt, use capacitors with a larger (for example, 2×) nominal value. The capacitors' effective series resistance (ESR), which usually rises at low temperatures, influences the amount of ripple on V+ and V–.
Use larger capacitors (up to 10 µF) to reduce the output impedance at V+ and V–.
Bypass VCC to ground with at least 0.1 µF. In applications sensitive to power-supply noise generated by the charge pumps, decouple VCC to ground with a capacitor the same size as (or larger than) the charge-pump capacitors (C1 to C4).
120 kbit/s, 1-nF load |