SCDS238H March   2007  – August 2022 TS3A24159

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics for 3-V Supply
    6. 6.6  Electrical Characteristics for 2.5-V Supply
    7. 6.7  Electrical Characteristics for 1.8-V Supply
    8. 6.8  Switching Characteristics for a 3-V Supply
    9. 6.9  Switching Characteristics for a 2.5-V Supply
    10. 6.10 Switching Characteristics for a 1.8-V Supply
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Electrical Characteristics for 2.5-V Supply

VCC = 2.3 V to 2.7 V, TA = –40°C to 85°C (unless otherwise noted) (1)
PARAMETERTEST CONDITIONSTAVCCMINTYPMAXUNIT
ANALOG SWITCH
Analog signal
range		VCOM, VNO,
VNC		0VCCV
Peak ON
resistance		rpeak0 ≤ (VNO or VNC) ≤ VCC,
ICOM = –8 mA,		Switch ON,
See Figure 7-1		25°C2.3 V0.35Ω
Full0.45
ON-state
resistance		ronVNO or VNC = 1.8 V,
ICOM = –8 mA,		Switch ON,
See Figure 7-1		25°C2.3 VΩ
Full0.4
ON-state
resistance match between channels		ΔronVNO or VNC = 1.8 V, 0.8 V,
ICOM = –8 mA,		Switch ON,
See Figure 7-1		25°C2.3 V0.010.05Ω
Full0.050.05
ON-state
resistance flatness		ron(flat)0 ≤ (VNO or VNC) ≤ VCC,
ICOM = –8 mA,		Switch ON,
See Figure 7-1		25°C2.3 V0.05Ω
VNO or VNC = 0.8 V, 1.8 V,
ICOM = –8 mA,		Switch ON,
See Figure 7-1		25°C0.030.08
Full0.1
NC, NO
OFF leakage
current		INC(OFF),
INO(OFF)		VNC or VNO = 0.5 V, VCOM = 2.2 V,
or
VNC or VNO = 2.2 V, VCOM = 0.5 V,		Switch OFF,
See Figure 7-2		25°C2.7 V–1010nA
Full–5050
NC, NO
ON leakage
current		INC(ON),
INO(ON)		VNC or VNO = 0.5 V, VCOM = Open,
or
VNC or VNO = 2.2 V, VCOM = Open,		Switch ON,
See Figure 7-3		25°C2.7 V–1010nA
Full–100100
ANALOG SWITCH (continued)
COM
ON leakage
current		ICOM(ON)VNC or VNO = Open, VCOM = 0.5 V,
or
VNC or VNO = Open, VCOM = 2.2 V,		Switch ON,
See Figure 7-3		25°C2.7 V–1010nA
Full–100100
DIGITAL CONTROL INPUTS (IN1, IN2)(2)
Input logic highVIHFull1.25V
Input logic lowVILFull0.5V
Input leakage
current		IIH, IILVI = 2.7 V or 025°C2.7 V–40540nA
Full–5050
DYNAMIC
Charge injectionQCVGEN = 0,
RGEN = 0,		CL = 1 nF,
See Figure 7-10		25°C2.5 V8pC
NC, NO
OFF capacitance		CNC(OFF),
CNO(OFF)		VNC or VNO = VCC or GND,
Switch OFF,		See Figure 7-425°C2.5 V90pF
NC, NO
ON capacitance		CNC(ON),
CNO(ON)		VNC or VNO = VCC or GND,
Switch ON,		See Figure 7-425°C2.5 V250pF
COM
ON capacitance		CCOM(ON)VCOM = VCC or GND,
Switch ON,		See Figure 7-425°C2.5 V250pF
Digital input
capacitance		CIVI = VCC or GND,See Figure 7-425°C2.5 V2pF
BandwidthBWRL = 50 Ω,
Switch ON,		See Figure 7-725°C2.5 V23MHz
OFF isolationOISORL = 50 Ω,
f = 1 MHz,		See Figure 7-825°C2.5 V–72dB
CrosstalkXTALKRL = 50 Ω,
f = 1 MHz,		See Figure 7-925°C2.5 V–96dB
Total harmonic
distortion		THDRL = 600 Ω,
CL = 50 pF,		f = 20 Hz to 20 kHz,
See Figure 7-11		25°C2.5 V0.003%
SUPPLY
Positive supply
current		ICCVI = VCC or GND25°C2.7 V10100nA
Full700
(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
(2) All unused digital inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs.