SCDS430A December   2020  – May 2021 TS3DV642-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 High-Speed Performances
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application - Demultiplexing HDMI Signals
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application - Multiplexing HDMI Signals
    4. 9.4 Systems Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RUA|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.1 Application Information

The TS3DV642-Q1 is an analog differential passive mux or demux that works for many high-speed differential interfaces with data rates up to 6 Gbps. The device also works for single ended signals. The TS3DV642-Q1 supports differential signaling with common mode voltage range (CMV) of 0 to 3.6 V and with differential amplitude up to 1800 mVpp, and single ended CMOS signaling with swing limited to 0 to 5.5 V. TS3DV642-Q1 can be used as mux or demux switch for:

  • HDMI 1.4 and HDMI 2.0 - up to 6 Gbps per channel
  • DisplayPort (DP) for RBR, HBR, and HBR-2 data rates - up to 5.4 Gbps per lane
  • DP++
  • Mipi DPHY interfaces such as DSI and CSI-2 - up to 4.5 Gbps per lane
  • Mipi CPHY based CSI-2
  • LVDS

6 Channels of the TS3DV642-Q1 are functionally equivalent and can be used in an arbitrary fashion for differential and single ended signals in any order. For example in Mipi DPHY applications any of the 6 differential channels can be used for clock signals. For Mipi CPHY applications the data pins can be grouped any order to form trio signals. For HDMI application, while TS3DV642-Q1 data signal pins are marked for specific HDMI use, the main-link data, main-link clock, DDC, HPD, CEC can be assigned in any order if required.