SCDS430A December   2020  – May 2021 TS3DV642-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 High-Speed Performances
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application - Demultiplexing HDMI Signals
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application - Multiplexing HDMI Signals
    4. 9.4 Systems Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RUA|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3 Typical Application - Multiplexing HDMI Signals

Figure 9-4 shows a 2:1 multiplexing use case where TS3DV642-Q1 is being used to choose HDMI signals from either an external HDMI connector or an internal HDMI source to connect to a HDMI sink device. Note HDMI connector in this use case represents a Sink port and is subject to HDMI sink compliance requirements. Part of the compliance requirements the mainlink data and clock signals needs to have 50Ω termination from each pin to 3.3 V supply with certain tolerance depending on data rate. Note the TS3DV642-Q1 adds a series resistance (RON) to the mainlink sink termination. To account for the additional series resistance it is recommended that sink internal termination resistance is reduce by equal amount. Where such provisioning is not possibble, alternate solution is to install external resistors on board from each pin to VCC as shown in Figure 9-4. In applications where a retimer is used behind a HDMI connector in sink application, this series resistance provisioning is not required as retimer termination is tested for HDMI compliance.

GUID-20210519-CA0I-FVFB-TCTZ-CPSV875PKBVJ-low.gif Figure 9-4 Multiplexing HDMI signals - schematic