SCDS430A December   2020  – May 2021 TS3DV642-Q1

PRODUCTION DATA  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 High-Speed Performances
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. Parameter Measurement Information
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Device Functional Modes
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application - Demultiplexing HDMI Signals
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application - Multiplexing HDMI Signals
    4. 9.4 Systems Examples
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RUA|42
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Description

The TS3DV642-Q1 is an analog high-speed bidirectional passive switch in mux or demux configurations that works for many high-speed differential interfaces with data rates up to 6 Gbps. It is suited for many applications including HDMI 1.4 / 2.0, DisplayPort 1.4 and Mipi DPHY / CPHY DSI / CSI-2. The TS3DV642-Q1 supports both differential and single-ended signaling - virtually compatible to most standard and non standard interfaces. The dynamic characteristics of the TS3DV642-Q1 allows high-speed switching with minimal attenuation to the signal eye diagram, and with very little added jitter. The device's silicon design is optimized for excellent frequency response at higher frequency spectrum of the signals. The device supports differential signaling with common mode voltage range (CMV) of 0 to 3.6 V. The device also supports 0 - 5.5 V single-ended CMOS signals.

The TS3DV642-Q1 consumes very low active power of 45 μA. The device also offers a power-down mode, in which all channels become Hi-Z and the device operates with minimal power.

Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
TS3DV642-Q1 WQFN (42) 3.50 mm x 9.00 mm
For all available packages, see the orderable addendum at the end of the datasheet.
Simplified Use Cases
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