SLLSF73C February   2018  – September 2019 TS3USBCA4

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics (3 V ≤ VCC ≤ 3.6 V)
    6. 6.6  Electrical Characteristics (2.4 V ≤ VCC ≤ 5.5 V)
    7. 6.7  Switching Characteristics (2.4 V ≤ VCC ≤ 5.5 V)
    8. 6.8  Timing Requirements (3 V ≤ VCC ≤ 3.6 V)
    9. 6.9  Timing Requirements (2.4 V ≤ VCC ≤ 5.5 V)
    10. 6.10 Timing Diagrams
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Audio Path
      2. 8.3.2 High-Speed Paths
      3. 8.3.3 3-level Input
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
    6. 8.6 Register Maps
      1. 8.6.1 TS3USBCA4 Registers
        1. 8.6.1.1 Revision_ID Register (Offset = 9h) [reset = 0h]
          1. Table 8. Revision_ID Register Field Descriptions
        2. 8.6.1.2 General_1 Register (Offset = Ah) [reset = 0h]
          1. Table 9. General_1 Register Field Descriptions
        3. 8.6.1.3 General_2 Register (Offset = Bh) [reset = 0h]
          1. Table 10. General_2 Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4 Device Functional Modes

Switch selection and flipping can be controlled either through the I2C interface in I2C-configuration mode or through the control pins (SEL0, SEL1, and FLIP when applicable) in pin-configuration mode, according to Table 1. Table 2 and Table 3 show the configuration truth table for TS3USBCA420 and TS3USBCA410, respectively. Note in TS3USBCA420 the flipping capability is available only in I2C-configuration mode.

Table 2. TS3USBCA420 Switch Configuration Truth Table(1)

{SWSEL[1:0], FLIPSEL}
(I2C-Configuration Mode) 		{SEL1, SEL0}
(Pin-Configuration Mode)		 Input Pin Output Pin
000 LL SBU1 LnBp
SBU2 LnBn
001 SBU1 LnBn
SBU2 LnBp
010 LH SBU1 MIC_GND1/Ln1
SBU2 MIC_GND2/Ln2
011 SBU1 MIC_GND1/Ln1
SBU2 MIC_GND2/Ln2
100 HL SBU1 LnCp
SBU2 LnCn
101 SBU1 LnCp
SBU2 LnCn
110 HH SBU1 LnAp
SBU2 LnAn
111 SBU1 LnAn
SBU2 LnAp

Table 3. TS3USBCA410 Switch Configuration Truth Table(1)

{SWSEL[1:0], FLIPSEL}
(I2C-Configuration Mode) 		{SEL1, SEL0, FLIP}
(Pin-Configuration Mode)		 Input Pin Output Pin
000 LLL SBU1 LnBp
SBU2 LnBn
001 LLH SBU1 LnBn
SBU2 LnBp
010 LHL SBU1 MIC_GND1/Ln1
SBU2 MIC_GND2/Ln2
011 LHH SBU1 MIC_GND1/Ln1
SBU2 MIC_GND2/Ln2
100 HLL SBU1
SBU2
101 HLH SBU1
SBU2
110 HHL SBU1 LnAp
SBU2 LnAn
111 HHH SBU1 LnAn
SBU2 LnAp
(1) For normal operation, drive OEn low (and in I2C mode set DEVICE_ENABLE = 1’b1). Driving the OEn pin high (or in I2C mode setting DEVICE_ENABLE = 1’b0) disables the switch. Note: The ports which are not selected by the control lines are in high impedance state

In addition to switch control, the I2C-configuration mode also allows enabling and disabling the device through the DEVICE_ENABLE register. Table 4 shows the details.

Table 4. TS3USBCA4 Enable/Disable Truth Table

OEn DEVICE_ENABLE Device Behavior
L 0 Device is shut down with IOFF_I2C.
On-chip bandgap and IO buffers are still on.
I2C is functional.
L 1 Normal operation.
H X Device is under reset with IOFF_OEN.
On-chip bandgap and IO buffers are off.
I2C is not functional.