SLLSF73C February   2018  – September 2019 TS3USBCA4

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics (3 V ≤ VCC ≤ 3.6 V)
    6. 6.6  Electrical Characteristics (2.4 V ≤ VCC ≤ 5.5 V)
    7. 6.7  Switching Characteristics (2.4 V ≤ VCC ≤ 5.5 V)
    8. 6.8  Timing Requirements (3 V ≤ VCC ≤ 3.6 V)
    9. 6.9  Timing Requirements (2.4 V ≤ VCC ≤ 5.5 V)
    10. 6.10 Timing Diagrams
    11. 6.11 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Analog Audio Path
      2. 8.3.2 High-Speed Paths
      3. 8.3.3 3-level Input
    4. 8.4 Device Functional Modes
    5. 8.5 Programming
    6. 8.6 Register Maps
      1. 8.6.1 TS3USBCA4 Registers
        1. 8.6.1.1 Revision_ID Register (Offset = 9h) [reset = 0h]
          1. Table 8. Revision_ID Register Field Descriptions
        2. 8.6.1.2 General_1 Register (Offset = Ah) [reset = 0h]
          1. Table 9. General_1 Register Field Descriptions
        3. 8.6.1.3 General_2 Register (Offset = Bh) [reset = 0h]
          1. Table 10. General_2 Register Field Descriptions
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.8 Timing Requirements (3 V ≤ VCC ≤ 3.6 V)

All minimum/maximum specifications are at TA = -40/85°C, VCC = 3.0 V/3.6 V, unless otherwise noted. Typical specifications are at TA = 25°C, VCC = 3.3 V, unless otherwise noted.
TEST CONDITIONS MIN NOM MAX UNIT
tON_MICGND Switch ON time for MIC/AGND path VPU=1.8V, RPU=2100Ω, CL=50pF 10 µs
tOFF_MICGND Switch OFF time for MIC/AGND path VPU=1.8V, RPU=2100Ω, CL=50pF 5 µs
tON_HS Switch ON time for high-speed path RS=50Ω, RL =50Ω 1.1 µs
tOFF_HS Switch OFF time for high-speed path RS=50Ω, RL =50Ω 725 ns
tBBM Break before make off time for MIC/AGND path VPU=1.8V, RPU=2100Ω, RL=50Ω, CL=50pF 1300 ns
tFLIP Response time for the FLIP pin RS=50Ω, RL=50Ω 1 µs
tDEV_ENABLE Device enable time from OEn = L to device ready OEn=L 350 µs
tDEV_DISABLE Device disable time from OEn = H to device shutdown OEn=H 175 ns
tD_PG VCC (MIN) to Internal Power Good asserted high (Refer to Figure 1) OEn=L 250 µs
tCFG_DB Debounce time for SEL[1:0] and I2C_EN configuration pins (Refer to Figure 1) OEn=L 150 ns
tVCC_RAMP VCC power supply (0 – 100%) ramp time requirement (Refer to Figure 1) 0.1 100 ms