SCDS252B July   2007  – June 2021 TS5A23157-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configurations and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Electrical Characteristics for 5-V Supply
    3. 6.3 Electrical Characteristics for 3.3-V Supply
    4. 6.4 Electrical Characteristics for 2.5-V Supply
    5. 6.5 Electrical Characteristics for 1.8-V Supply
    6. 6.6 Typical Characteristics
  7. 7 Parameter Description
  8. 8 Parameter Measurement Information
  9. 9 Function and Summary of Characteristics
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
    4. 10.4 Device Functional Modes
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Application
    3. 11.3 Design Requirements
    4. 11.4 Detailed Design Procedure
    5. 11.5 Application Performance Plots
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Receiving Notification of Documentation Updates
    2. 14.2 Support Resources
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information
    1. 15.1 Ordering Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.4 Device Functional Modes

The digital control pins (IN1 and IN2) are the logic pins that control their respective common connections (COM1 and COM2) with both the normally closed pathways (NC1 and NC2) and the normally open pathways (NO1 and NO2). When either or both digital control pins (IN1 and IN2) are pulled low their respecitive common (COM1 and COM2) and normally closed (NC1 and NC2) pins are connected. When either or both digital control pins (IN1 and IN2) are pulled high their respective common (COM1 and COM2) and normally open (NO1 and NO2) pins are connected.

The TS5A23157-Q1 can be operated without any external components except for the supply decoupling capacitors. Unused logic control pins (INx) should be tied to GND or VDD in order to ensure the device does not consume additional current as highlighted in Implications of Slow or Floating CMOS Inputs. Unused signal path inputs (NCx, NOx, and COMx) should be connected to GND.