at TA = 25°C, VS = 5.5 V, RL = 10 kΩ connected to VS / 2, VCM = VS / 2, and VOUT = VS / 2 (unless otherwise noted)
Figure 7-1 Offset Voltage
Production Distribution Figure 7-3 Offset Voltage
vs Temperature Figure 7-5 Offset Voltage
vs Power Supply Figure 7-7 Closed-Loop Gain vs Frequency V+ = 2.75 V, V– = –2.75 V |
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Figure 7-9 Output Voltage Swing vs Output CurrentVS = 5.5 V | VCM = (V–) – 0.1 V to (V+) + 0.1 V | RL= 10 kΩ |
TA= –40°C to 125°C |
Figure 7-11 CMRR vs TemperatureFigure 7-13 PSRR vs Temperature Figure 7-15 Input Voltage Noise Spectral Density vs Frequency VS = 5.5 V | VCM = 2.5 V | RL = 2 kΩ |
G = 1 | BW = 80 kHz | f = 1 kHz |
Figure 7-17 THD + N vs AmplitudeFigure 7-19 Quiescent Current vs Supply Voltage Figure 7-21 Open-Loop Output Impedance vs Frequency V+ = 2.75 V | V– = –2.75 V | RL = 10 kΩ |
G = –1 V/V | VOUT step = 100 mVp-p | |
Figure 7-23 Small-Signal Overshoot vs Load CapacitanceV+ = 2.75 V, V– = –2.75 V, G = –10 V/V |
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Figure 7-25 Overload RecoveryV+ = 2.75 V | V– = –2.75 V | CL = 100 pF |
G = 1 V/V | | |
Figure 7-27 Large-Signal Step ResponseFigure 7-29 Electromagnetic Interference Rejection Ratio Referred to Noninverting Input (EMIRR+) vs Frequency Figure 7-31 Phase Margin vs Capacitive Load Figure 7-33 Large Signal Settling Time (Positive) Figure 7-2 Offset Voltage
Drift Distribution
V+ = 2.75 V, V– = –2.75 V |
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Figure 7-4 Offset Voltage
vs Common-Mode VoltageFigure 7-6 Open-Loop Gain
and Phase vs Frequency Figure 7-8 Input Bias Current vs Temperature Figure 7-10 CMRR and PSRR vs Frequency (Referred to Input) VS = 5.5 V | VCM = (V–) –0.1 V to (V+) –1.4 V | RL= 10 kΩ |
TA= –40°C to 125°C |
Figure 7-12 CMRR vs TemperatureFigure 7-14 0.1-Hz to 10-Hz Input Voltage Noise VS = 5.5 V | VCM = 2.5 V | RL = 2 kΩ |
G = 1 | VOUT = 0.5 VRMS | BW = 80 kHz |
Figure 7-16 THD + N vs FrequencyVS = 5.5 V | VCM = 2.5 V | RL = 2 kΩ |
G = –1 | BW = 80 kHz | f = 1 kHz |
Figure 7-18 THD + N vs AmplitudeFigure 7-20 Quiescent Current vs Temperature V+ = 2.75 V | V– = –2.75 V | G = 1 V/V |
RL = 10 kΩ | VOUT step = 100 mVp-p | |
Figure 7-22 Small-Signal Overshoot vs Load CapacitanceV+ = 2.75 V, V– = –2.75 V |
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Figure 7-24 No Phase ReversalV+ = 2.75 V, V– = –2.75 V, G = 1 V/V |
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Figure 7-26 Small-Signal Step ResponseFigure 7-28 Short-Circuit Current vs Temperature V+ = 2.75 V, V– = –2.75 V |
Figure 7-30 Channel Separation vs FrequencyFigure 7-32 Open Loop Voltage Gain vs Output Voltage Figure 7-34 Large Signal Settling Time (Negative)