SBOSA18C may   2020  – june 2023 TSV911A-Q1 , TSV912A-Q1 , TSV914A-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Device Comparison Table
  7. 6 Pin Configuration and Functions
  8. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information: TSV911A-Q1
    5. 7.5 Thermal Information: TSV912A-Q1
    6. 7.6 Thermal Information: TSV914A-Q1
    7. 7.7 Electrical Characteristics
    8. 7.8 Typical Characteristics
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Rail-to-Rail Input
      2. 8.3.2 Rail-to-Rail Output
      3. 8.3.3 Overload Recovery
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 Input and ESD Protection
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3 Power Supply Recommendations

The TSV91xA-Q1 series is specified for operation from 2.5 V to 5.5 V (±1.25 V to ±2.75 V); many specifications apply from –40°C to 125°C. Typical Characteristics presents parameters that can exhibit significant variance with regard to operating voltage or temperature.

CAUTION:

Supply voltages larger than 6 V can permanently damage the device; see the Absolute Maximum Ratings table.

Place 0.1-µF bypass capacitors close to the power-supply pins to reduce errors coupling in from noisy or high-impedance power supplies. For more detailed information on bypass capacitor placement, see Layout Example.