SLLSF63C March   2018  – July 2024 TUSB1002A

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 4-Level Control Inputs
      2. 6.3.2 Linear Equalization
      3. 6.3.3 Adjustable VOD Linear Range and DC Gain
      4. 6.3.4 USB3.2 Dual Channel Operation (MODE = “F”)
      5. 6.3.5 USB3.2 Single Channel Operation (MODE = “1”)
      6. 6.3.6 PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
      7. 6.3.7 Basic Redriver Operation (MODE = “0”)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Disconnect Mode
    5. 6.5 U0 Mode
    6. 6.6 U1 Mode
    7. 6.7 U2/U3 Mode
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical USB3.2 Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 ESD Protection
      4. 7.2.4 Application Curves
    3. 7.3 Typical SATA, PCIe and SATA Express Application
      1. 7.3.1 Design Requirements
      2. 7.3.2 Detailed Design Procedure
      3. 7.3.3 Application Curves
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

over operating free-air temperature and voltage range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
POWER
PU0_SSP_1200mVPower under USB3.1 operation in U0 operating at SuperSpeedPlug datarate with linear range set to 1200mV.At 10Gbps; VCC = 3.3V; EN = 1; Pattern = CP9; VOD = 1200mVpp330mW
PU0_SSP_1000mVPower under USB3.1 operation in U0 operating at SuperSpeedPlug datarate with linear range set to 1000mV.At 10Gbps; VCC = 3.3V; EN = 1; Pattern = CP9; VOD = 1000mVpp310mW
PU0_SSP_900mVPower under USB3.1 operation in U0 operating at SuperSpeedPlug datarate with linear range set to 900mV.At 10Gbps; VCC = 3.3V; EN = 1; Pattern = CP9; VOD = 900mVpp295mW
PU1Power in U1 with linear range set to 1200mV.In U1; VCC = 3.3V; EN = 1; VOD = 1200mVpp330mW
PU2U3Power when in U2/U3 state.VCC = 3.3V; EN = 1; Both channels in U2/U3;1.5mW
PDISCONNECT_NONEPower when no USB device detected on both TX1P/N and TX2P/N.VCC = 3.3V; EN = 1; RX1 and RX2 termination disabled;1.9mW
PDISCONNECT_ONEPower when a single USB device detected on either TX1P/N or TX2P/N.VCC = 3.3V; EN = 1; Either RX1 or RX2 termination enabled but not both enabled;1.9mW
PSHUTDOWNShutdown power when EN = 0.VCC = 3.3V; EN = 0;0.7mW
4-level Inputs (CFG[2:1], MODE, CH1_EQ[2:1], CH2_EQ[2:1])
VTHThreshold "0" / "R"VCC = 3.3V0.55V
Threshold "R" / "F"VCC = 3.3V1.65V
Threshold "F" / "1"VCC = 3.3V2.8V
IIHHigh-level input currentVCC = 3.6V; VIN = 3.6V2080µA
IILLow-level input currentVCC = 3.6V; VIN = 0 V-160-40µA
RPUInternal pullup resistance45
RPDInternal pulldown resistance95
EN, DCBOOST#
VIHHigh-level input voltageVCC = 3.3V1.73.6V
VILLow-level input voltageVCC = 3.3V00.7V
IIHHigh-level input currentVCC = 3.6V; VIN = 3.6V-1010µA
IILLow-level input currentVCC = 3.6V; VIN = 0 V-1515µA
RPU_ENInternal pullup resistance for EN and DCBOOST#400
USB3.1 Receiver Interface (RX1P/N and RX2P/N)
RL_100MHzRx Differential return loss at 100MHz to 2.5GHzSDD11 100MHz to 2.5GHz at 90Ω-18dB
RL_5 GHzRx Differential return loss at 5GHzSDD11 5GHz at 90Ω-14dB
RL_10 GHzRx Differential return loss from 5 to 10GHzSDD11 5GHz to 10 GHz at 90Ω-6dB
RL_CMRx common mode return lossSCC11 0.5 to 5 GHz at 90Ω-12dB
X-TalkDifferential crosstalk between TX and RX signal pairs-50dB
EACGAIN_5GHzMax AC Equalization Gain50mVpp CP10 at 5GHz; VCC = 3.3V;16dB
EDC_GAIN0DC Gain at 0dB setting200mVpp VID at 100MHz; 1200mV Linear Range Setting;.7dB
EDC_GAIN1DC Gain at 1dB setting200mVpp VID at 100MHz; 1200mV Linear Range Setting;1.6dB
EDC_GAIN2DC Gain at 2dB setting200mVpp VID at 100MHz; 1000mV Linear Range Setting;2.3dB
EDC_GAIN-1DC Gain at -1dB setting200mVpp VID at 100MHz; 1200mV Linear Range Setting;-0.25dB
VDIFF_INInput differential peak-peak voltage swing range1200mV
VRX-DC-CMRX DC common mode voltage0V
RRX-DC-CMRX DC common mode impedanceMeasured at connector; Present when USB Device detected on TXP/N;1830Ω
RRX-DC-DIFFRX DC differential impedanceMeasured at connector; Present when USB Device detected on TXP/N;72120Ω
ZRX-DC-DIFFDC Input CM Input ImpedanceV > 0 during RESET or power down.1. Rx DC CM Impedance with Rx terminations not powered. 2. Measured over the range 0 - 500mV with respect to GND. 3. Only DC input CM Input impedanceV > 0 is specified.35
VRX-SIGNAL-DETInput differential peak-to-peak signal detect assert levelAt 10Gbps; No loss input channel and PRBS7 pattern.85mV
VRX-IDLE-DETInput differential peak-to-peak signal detect deassert levelAt 10Gbps; No loss input channel and PRBS7 pattern.60mV
VRX-LFPS-DETLFPS detect threshold.Below min is squelched100310mV
VRX-CM-AC-PPeak RX AC common mode voltageMeasured at package pin.150mV
USB3.1 Transmitter Interface (TX1P/N and TX2P/N)
RL_TX_100MHzTx Differential return loss at 100MHzSDD22 100MHz - 2.5GHz at 90Ω-20dB
RL_TX_2.5GHzTx Differential return loss at 5GHzSDD22 5GHz at 90Ω-16dB
RL_TX_10GHzTx Differential return loss from 5 to 10GHzSDD22 5GHz to 10 GHz at 90Ω-8.5dB
RL_TX_CMTx common mode return lossSCC22 0.5 to 5 GHz at 90Ω-6.7dB
VTX-DIFFPP-1200Differential peak-to-peak TX voltage swing linear dynamic range at 100MHz1200mVpp setting; 100MHz;  Measured at -1dB compression point = 20 log(VOD/VOD_linear)1000mV
Differential peak-to-peak TX voltage swing linear dynamic range at 5GHz1200mVpp setting; 5GHz; Measured at -1dB compression point = 20 log(VOD/VOD_linear)1300mV
VTX-DIFFPP-1000Differential peak-to-peak TX voltage swing linear dynamic range at 100MHz1000mVpp setting; 100MHz; Measured at -1dB compression point = 20 log(VOD/VOD_linear)900mV
Differential peak-to-peak TX voltage swing linear dynamic range at 5GHz1000mVpp setting; 5GHz; Measured at -1dB compression point = 20 log(VOD/VOD_linear)1150mV
VTX-DIFFPP-900Differential peak-to-peak TX voltage swing linear dynamic range at 100MHz900mVpp setting; 100MHz; Measured at -1dB compression point = 20 log(VOD/VOD_linear)800mV
Differential peak-to-peak TX voltage swing linear dynamic range at 5GHz900mVpp setting; 5GHz; Measured at -1dB compression point = 20 log(VOD/VOD_linear)1000mV
VTX-RCV-DETECTAmount of voltage change allowed during Rx Detection.Measured at package pins.600mV
VTX-CM-IDLE-DELTATransmitter idle common mode voltage change U2/U3 state.Max allowed instantaneous commode-mode voltage at connector side of AC coupling capacitor. This is an absolute voltage spec referenced to the receive side termination ground.-600600mV
VTX-DC-CMTX DC common mode voltage1200mVpp linear range setting;01.852.05V
VTX-CM-AC-PP-ACTIVETransmitter AC common mode peak-peak voltage in U0. Maximum mismatch from TXP+TXN for both time and amplitude.1200mVpp linear setting; CHx_EQ setting matches input channel insertion loss;116mV
VTX-IDLE-DIFF-AC-PPAC electrical idle differential peak-to-peak output voltage010mV
VTX-CM-DC-ACTIVE-IDLE-DELTAAbsolute DC common mode voltage between U1 and U0200mV
RTX-DC-CMTX DC common mode impedance1830Ω
RTX-DC-DIFFTX DC differential impedance72120Ω
ITX-SHORTTransmitter short-circuit current limit.107mA
CAC-COUPLINGExternal AC coupling capacitor on differential pairs.75265nF