SLLSF63C March   2018  – July 2024 TUSB1002A

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Timing Requirements
    7. 5.7 Switching Characteristics
    8. 5.8 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 4-Level Control Inputs
      2. 6.3.2 Linear Equalization
      3. 6.3.3 Adjustable VOD Linear Range and DC Gain
      4. 6.3.4 USB3.2 Dual Channel Operation (MODE = “F”)
      5. 6.3.5 USB3.2 Single Channel Operation (MODE = “1”)
      6. 6.3.6 PCIe/SATA/SATA Express Redriver Operation (MODE = “R”; CFG1 = "0"; CFG2 = "0" )
      7. 6.3.7 Basic Redriver Operation (MODE = “0”)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Shutdown Mode
      2. 6.4.2 Disconnect Mode
    5. 6.5 U0 Mode
    6. 6.6 U1 Mode
    7. 6.7 U2/U3 Mode
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical USB3.2 Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 ESD Protection
      4. 7.2.4 Application Curves
    3. 7.3 Typical SATA, PCIe and SATA Express Application
      1. 7.3.1 Design Requirements
      2. 7.3.2 Detailed Design Procedure
      3. 7.3.3 Application Curves
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.2.3 ESD Protection

It may be necessary to incorporate an ESD component to protect the TUSB1002A from electrostatic discharge (ESD). TI recommends following the ESD protection recommendations listed in Table 7-2. A clamp voltage greater than value specified in Table 7-2 may require a RESD on each differential pin. Place the ESD component near the USB connector.

Table 7-2 ESD Diodes Recommended Characteristics
Parameter Recommendation
Breakdown voltage ≥ 3.5V
I/O line capacitance Data rates ≤ 5Gbps: ≤ 0.50pF
Data rates > 5Gbps: ≤ 0.35pF
Delta capacitance between any P and N I/O pins ≤ 0.07pF
Clamping voltage at 8A IPP IO to GND (1) ≤ 4.5V
Typical dynamic resistance ≤ 30mΩ
(1) According to IEC 61000-4-5 (8/20μs current waveform)
Table 7-3 Recommended ESD Protection Component
Manufacturer Part Number RESD to pass IEC 61000-4-2 Contact ±8kV
Nexperia PUSB3FR4 2Ω
Nexperia PESD2V8Y1BSF 2Ω
Texas Instruments TPD1E04U04DPLR 2Ω
Texas Instruments TPD4E02B04DQAR 2Ω