SLLSF47D February 2018 – April 2024 TUSB1044
PRODUCTION DATA
TUSB1044 receiver lanes have controls for receiver equalization for upstream and downstream facing ports. The receiver equalization gain value can be controlled either through I2C registers or through GPIOs. Table 6-7 details the gain value for each available combination when TUSB1044 is in GPIO mode. These same options are also available per channel and for upstream and downstream facing ports in I2C mode by updating registers URX[2:1]EQ_SEL, UTX[2:1]EQ_SEL, DRX[2:1]EQ_SEL, and DTX[2:1]EQ_SEL.
| Downstream Facing Ports using 1100mV linearity setting | Upstream Facing Port using 1100mV linearity setting | |||||||
|---|---|---|---|---|---|---|---|---|
| EQ Setting# | DEQ1 pin Level | DEQ0 pin Level | EQ GAIN 5GHz (dB) | EQ GAIN 4.05GHz (dB) | UEQ1 pin Level | UEQ0 pin Level | EQ GAIN 5GHz (dB) | EQ GAIN 4.05GHz (dB) |
| 0 | 0 | 0 | -2.1 | -1.4 | 0 | 0 | -4.4 | -3.3 |
| 1 | 0 | R | 0 | 0.4 | 0 | R | -2.2 | -1.5 |
| 2 | 0 | F | 1.5 | 1.7 | 0 | F | 0.7 | 0.0 |
| 3 | 0 | 1 | 3.0 | 3.2 | 0 | 1 | 0.9 | 1.4 |
| 4 | R | 0 | 4.0 | 4.1 | R | 0 | 1.9 | 2.4 |
| 5 | R | R | 5.0 | 5.2 | R | R | 3.0 | 3.5 |
| 6 | R | F | 5.9 | 6.1 | R | F | 3.8 | 4.3 |
| 7 | R | 1 | 6.7 | 6.9 | R | 1 | 4.7 | 5.2 |
| 8 | F | 0 | 7.4 | 7.7 | F | 0 | 5.4 | 6.0 |
| 9 | F | R | 8.0 | 8.3 | F | R | 6.0 | 6.6 |
| 10 | F | F | 8.5 | 8.8 | F | F | 6.5 | 7.2 |
| 11 | F | 1 | 9.0 | 9.4 | F | 1 | 7.1 | 7.7 |
| 12 | 1 | 0 | 9.4 | 9.8 | 1 | 0 | 7.5 | 8.1 |
| 13 | 1 | R | 9.8 | 10.3 | 1 | R | 7.9 | 8.6 |
| 14 | 1 | F | 10.1 | 10.6 | 1 | F | 8.3 | 9.0 |
| 15 | 1 | 1 | 10.5 | 11.0 | 1 | 1 | 8.6 | 9.4 |