SLLSFL2A April   2022  – May 2024 TUSB1142

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Supply Characteristics
    6. 5.6  Control I/O DC Electrical Characteristics
    7. 5.7  USB Electrical Characteristics
    8. 5.8  Timing Requirements
    9. 5.9  Switching Characteristics
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 4-Level Inputs
      2. 7.3.2 USB Receiver Linear Equalization
        1. 7.3.2.1 Linear EQ Configuration
        2. 7.3.2.2 Full Adaptive Equalization
        3. 7.3.2.3 Fast Adaptive Equalization
      3. 7.3.3 USB Transmitter
        1. 7.3.3.1 Linearity VOD
        2. 7.3.3.2 Limited VOD
        3. 7.3.3.3 Transmit Equalization (Limited Redriver Mode Only)
      4. 7.3.4 USB 3.2 2:1 MUX Description
      5. 7.3.5 USB Polarity Inversion
      6. 7.3.6 Receiver Detect Control
    4. 7.4 Device Functional Modes
      1. 7.4.1 MODE Pin
      2. 7.4.2 Rx EQ Configuration in Pin-Strap Mode
      3. 7.4.3 USB 3.2 Power States
      4. 7.4.4 Disabling U1 and U2
    5. 7.5 Programming
      1. 7.5.1 Pseudocode Examples
        1. 7.5.1.1 Fixed EQ with Linear Redriver Mode
        2. 7.5.1.2 Fixed EQ with Limited Redriver Mode
        3. 7.5.1.3 Fast AEQ with Linear Redriver Mode
        4. 7.5.1.4 Fast AEQ with Limited Redriver Mode
        5. 7.5.1.5 Full AEQ with Linear Redriver Mode
        6. 7.5.1.6 Full AEQ with Limited Redriver Mode
      2. 7.5.2 TUSB1142 I2C Address Options
      3. 7.5.3 TUSB1142 I2C Target Behavior
    6. 7.6 Register Map
      1. 7.6.1 TUSB1142 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 USB SSTX Receiver Configuration
        2. 8.2.2.2 USB CRX1/2 Receiver Configuration
          1. 8.2.2.2.1 Fixed Equalization
          2. 8.2.2.2.2 Full Adaptive Equalization
          3. 8.2.2.2.3 Fast Adaptive Equalization
        3. 8.2.2.3 ESD Protection
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.1 Design Requirements

For this design example, use the parameters shown in Table 8-1.

Table 8-1 Design Parameters
PARAMETERVALUE
10 Gbps USB 3.2 pre-channel A to B PCB trace length, XAB. Refer to Figure 8-1. 2 inches <= XAB <= 12 inches - XCD
10 Gbps USB post-channel C to D PCB trace length, XCD. Refer to Figure 8-1.up to 4 inches
Minimum distance of the AC capacitors from TUSB1142, LAC-CAP0.4 inches
Maximum distance of ESD component from the USB receptacle, LESD1.0 inches
Maximum distance of series resistor (RESD) from ESD component, LR_ESD.0.25 inches
CAC-USB1 AC-coupling capacitor (75 nF to 265 nF)220 nF
CAC-USB2 AC-coupling capacitor (297 nF to 363 nF) Options:
  • RX1 and RX2 are DC-coupled to USB receptacle
  • 330 nF AC-couple with RRX resistor
Optional RRX resistor (220-kΩ ± 5%)No used
RESD (0-Ω to 2.2-Ω)1-Ω
VCC supply (3-V to 3.6-V)3.3-V
I2C Mode or Pin-strap Mode I2C Mode. (MODE = "F")
1.8-V or 3.3-V I2C Interface3.3-V I2C. VIO_SEL pin to Float "F".