SLLS413L February   2000  – June 2017 TUSB2046B , TUSB2046I

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      USB-Tiered Configuration Example
  4. 4 Revision History
  5. 5 Description (Continued)
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Differential Driver Switching Characteristics (Full Speed Mode)
    7. 7.7 Differential Driver Switching Characteristics (Low Speed Mode)
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 USB Power Management
      2. 8.3.2 Clock Generation
    4. 8.4 Device Functional Modes
      1. 8.4.1 Vendor ID and Product ID With External Serial EEPROM
    5. 8.5 Programming
      1. Table 1. EEPROM Memory Map
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
    1. 10.1 TUSB2046x Power Supply
    2. 10.2 Downstream Port Power
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 Placement
      2. 11.1.2 Differential Pairs
      3. 11.1.3 Ground
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Related Links
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.5 Electrical Characteristics

over recommended ranges of operating free-air temperature and supply voltage (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN MAX UNIT
VOH High-level output voltage TTL/LVCMOS IOH = –4 mA VCC  – 0.5 V
USB data lines R(DRV) = 15 kΩ to GND 2.8
IOH = –12 mA (without R(DRV)) VCC  – 0.5
VOL Low-level output voltage TTL/LVCMOS IOL = 4 mA 0.5 V
USB data lines R(DRV) = 1.5 kΩ to 3.6 V 0.3
IOL = 12 mA (without R(DRV)) 0.5
VIT+ Positive input threshold TTL/LVCMOS 1.8 V
Single-ended 0.8 V ≤ VICR ≤ 2.5 V 1.8
VIT– Negative-input threshold TTL/LVCMOS 0.8 V
Single-ended 0.8 V ≤ VICR ≤ 2.5 V 1
Vhys Input hysteresis(1)
(VT+ – VT–)		 TTL/LVCMOS 0.3 0.7 mV
Single-ended 0.8 V ≤ VICR ≤ 2.5 V 300 500
IOZ High-impedance output current TTL/LVCMOS V = VCC or GND(2) ±10 μA
USB data lines 0 V ≤ VO ≤ VCC ±10
IIL Low-level input current TTL/LVCMOS VI = GND –1 μA
IIH High-level input current TTL/LVCMOS VI = VCC 1 μA
z0(DRV) Driver output impedance USB data lines Static VOH or VOL 7.1 19.9 Ω
VID Differential input voltage USB data lines 0.8 V ≤ VICR ≤ 2.5 V 0.2 V
ICC Input supply current Normal operation 40 mA
Suspend mode 1 μA
(1) Applies for input buffers with hysteresis.
(2) Applies for open-drain buffers.