8.3.1 USB Power Management

The TUSB2077A supports both bus-powered and self-powered modes. External power-management devices, such as the TPS2044, are required to control the 5-V power source switching (on/off) to the downstream ports and to detect an overcurrent condition from the downstream ports individually or ganged. Outputs from external power devices provide overcurrent inputs to the TUSB2077A OVRCUR pins in case of an overcurrent condition, the corresponding PWRON pins are disabled by the TUSB2077A. In the ganged mode, all PWRON signals transition simultaneously, and any OVRCUR input can be used. In the nonganged mode, the PWRON outputs and OVRCUR inputs operate on a per-port basis.

Both bus-powered and self-powered hubs require overcurrent protection for all downstream ports. The two types of protection are individual-port management (individual-port basis) or ganged-port management (multiple-port basis). Individual-port management requires power-management devices for each individual downstream port, but adds robustness to the USB system because, in the event of an overcurrent condition, the USB host only powers down the port that has the condition. The ganged configuration uses fewer power management devices and thus has lower system costs, but in the event of an overcurrent condition on any of the downstream ports, all the ganged ports are disabled by the USB host.

Using a combination of the BUSPWR and EEDATA/GANGED inputs, the TUSB2077A supports four modes of power management: bus-powered hub with either individual-port power management or ganged-port power management, and the self-powered hub with either individual-port power management or ganged-port power management. Texas Instruments supplies the complete hub solution because we offer this TUSB2077A along with the power-management devices needed to implement a fully USB compliant system.

8.3.2 Clock Generation

The TUSB2077A provides the flexibility of using either a 6-MHz or a 48-MHz clock. The logic level of the MODE terminal controls the selection of the clock source. When MODE is low, the output of the internal APLL circuitry is selected to drive the internal core of the chip. When MODE is high, the XTAL1 input is selected as the input clock source and the APLL circuitry is powered down and bypassed. The internal oscillator cell is also powered down while MODE is high. For 6-MHz operation, TUSB2077A requires a 6-MHz clock signal on XTAL1 terminal (with XTAL2 for a crystal) from which its internal APLL circuitry generates a 48-MHz internal clock to sample the data from the upstream port. For 48-MHz operation, the clock cannot be generated with a crystal, using the XTAL2 output, because the internal oscillator cell only supports the fundamental frequency. If low-power suspend and resume are desired, a passive crystal or resonator must be used, although the hub supports the flexibility of using any device that generates a 6-MHz clock. Because most oscillators cannot be stopped while power is on, their use prohibits low-power suspend, which depends on disabling the clock. When the oscillator is used, by connecting its output to the XTAL1 terminal and leaving the XTAL2 terminal open, its TTL output level cannot exceed 3.6 V. If a 6-MHz oscillator is used, it must be stopped at logic low whenever SUSPND is high. For crystal or resonator implementations, the XTAL1 terminal is the input and the XTAL2 terminal is used as the feedback path. A sample crystal tuning circuit is shown in Figure 5.

A.

NOTE:

This figure assumes a 6-MHz fundamental crystal that is parallel loaded. The component values of C1, C2, and R_d are determined using a crystal from Fox Electronics – part number HC49U-6.00MHz 30\50\0±70\20, which means ±30 ppm at 25°C and ±50 ppm from 0°C to 70°C. The characteristics for the crystal include a load capacitance (C_L) of 20 pF, maximum shunt capacitance (C_o) of 7 pF, and the maximum ESR of 50 Ω. In order to insure enough negative resistance, use C1 = C2 = 27 pF. The resistor R_d is used to trim the gain, and R_d = 1.5 kΩ is recommended.

Figure 5. Crystal Tuning Circuit

8.4.1 Vendor ID and Product ID With External Serial EEPROM

The EXTMEM (pin 47) enables or disables the optional EEPROM interface. When EXTMEM is high, the vendor and product IDs (VID and PID) use defaults, such that the message displayed during enumeration is General Purpose USB Hub. For this configuration, pin 8 functions as the GANGED input pin and EECLK (pin 7) is unused. If custom VID and PID descriptors are desired, the EXTMEM must be tied low (EXTMEM = 0) and a SGS Thompson M93C46 EEPROM, or equivalent, stores the programmable VID, PID, and GANGED values. For this configuration, pin 7 and 8 function as the EEPROM interface signals with pin 7 as EECLK and pin 8 as EEDATA, respectively. A block diagram example of how to connect the external EEPROM if a custom product ID and vendor ID are desired is shown in Figure 6.

Figure 6. Typical Application of the TUSB2077A USB Hub

Table 1. EEPROM Memory Map