SLLSFX8 February   2024 TUSB211A-Q1

PRODUCTION DATA  

  1.   1
  2. Features
  3. Applications
  4. Description
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Requirements
    8. 5.8 Typical Characteristics
  7. Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 High-Speed EQ
    4. 6.4 Device Functional Modes
      1. 6.4.1 Low-Speed (LS) Mode
      2. 6.4.2 Full-Speed (FS) Mode
      3. 6.4.3 High-Speed (HS) Mode
      4. 6.4.4 High-Speed Downstream Port Electrical Compliance Test Mode
      5. 6.4.5 Shutdown Mode
  8. Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Test Procedure to Construct USB High-Speed Eye Diagram
          1. 7.2.2.1.1 For a Host Side Application
          2. 7.2.2.1.2 For a Device Side Application
      3. 7.2.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RWB|12
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Electrical Characteristics

Over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP (1) MAX UNIT
POWER
IACTIVE_HS High Speed Active Current USB channel = HS mode. 480Mbps traffic. VCC supply stable, with EQ = Max 22 36 mA
IIDLE_HS High Speed Idle Current USB channel = HS mode, no traffic. VCC supply stable, EQ = Max 22 36 mA
IHS_SUSPEND High Speed Suspend Current USB channel = HS Suspend mode. VCC supply stable 0.75 1.4 mA
IFS Full-Speed Current USB channel = FS mode, 12Mbps traffic, Vcc supply stable 0.75 1.4 mA
IDISCONN Disconnect Power Host side application. No device attachment. 0.80 1.4 mA
ISHUTDN Shutdown Power RSTN driven low, VCC supply stable 60 115 µA
CONTROL PIN LEAKAGE
ILKG_FS Pin failsafe leakage current for RSTN VCC = 0V, pin at VIH, max 10 15 µA
INPUT RSTN
VIH High level input voltage 1.5 3.6 V
VIL Low-level input voltage 0 0.5 V
IIH High level input current VIH = 3.6V, RPU enabled ±15 µA
IIL Low level input current VIL = 0V, RPU enabled ±20 µA
INPUT EQ
REQ_LVL0 External pulldown resistor for EQ Level 0 160 Ω
REQ_LVL1 External pulldown resistor for EQ Level 1 1.5 1.8 2
REQ_LVL2 External pulldown resistor for EQ Level 2 3.4 3.6 3.96
REQ_LVL3 External pulldown resistor for EQ Level 3 to remove upper limit for resistor value, can be left open 7.5
OUTPUTS CD, ENA_HS
VOH High level output voltage for CD and ENA_HS IO = –50µA, VCC >= 3.0V 2.5 V
VOH High level output voltage  for CD IO = –25µA, VCC = 2.3V 1.7 V
VOH High level output voltage  for ENA_HS IO = –25µA, VCC = 2.3V 1.8 V
VOL Low level output voltage  for CD and ENA_HS IO = 50µA 0.3 V
DxP, DxM
CIO_DXX Capacitance to GND Measured with VNA at 240MHz, VCC supply stable, Redriver off 2.5 pF
All typical values are at VCC = 5V, and TA = 25°C.