SLLSFI4D
November 2021 ā April 2024
TUSB2E11
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Device Version Comparison
4.1
Device Variants
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Timing Requirements
6.8
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
8.4.1
Repeater Mode
8.4.2
Power Down Mode
8.4.3
Disabled Mode
8.4.4
UART Mode
8.4.5
Auto-Resume ECR
8.4.6
L2 State Interrupt Modes
8.4.7
Attach Detect Interrupt Mode
8.4.8
GPIO Mode
8.4.9
USB 2.0 High-Speed HOST Disconnect Detection
8.4.10
Frame Based Low Power Mode
8.4.11
Battery Charging
8.5
Manufacturing Test Modes
8.5.1
USB DP Test Procedure
8.5.2
USB DM Test Procedure
8.6
I2C Target Interface
9
Register Access Protocol (RAP)
10
Register Map
10.1
TUSB2E11 Registers
11
Application and Implementation
11.1
Application Information
11.2
Typical Application
11.2.1
Design Requirements
11.2.2
Detailed Design Procedure
11.2.3
Application Curves
11.3
Power Supply Recommendations
11.3.1
Power Up Reset
11.4
Layout
11.4.1
Layout Guidelines
11.4.2
Example Layout for Application with 1.8V I2C Variant
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Support Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Revision History
14
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
YCG|15
MXBG423B
Thermal pad, mechanical data (Package|Pins)
Orderable Information
sllsfi4d_oa
sllsfi4d_pm
1
Features
USB 2.0 and eUSB2 (rev 1.2) compliant
Low-speed, full-speed, high-speed signaling
Best-in-class high-speed total jitter of 20ps
Register access protocol receptor capable
Host and device mode (dual-role device) support
Auto detection for I
2
C or strap-pin options
Three strap-pins for USB 2.0 high-speed channel compensation settings
I
2
C device interface for more configurations
Device variants
eUSB2 1.0V or 1.2V signaling interface
eUSB2 trace loss compensation levels for different product form-factors
1.2V or 1.8V I
2
C interface
Optional battery charging and detection support
BC 1.2 CDP or DCP divider mode advertising
Data-aware
USB Type-Cā¢
compatible BC 1.2 SDP, CDP, and DCP divider mode detection
Dual-role auto switching between charger advertising or detection
CTA-936 USB Carkit UART support
Supports auto-resume ECR as well as L2 interrupt resume mode
Optional GPIOs: interrupt GPIO2, debug, I
2
C ā GPIO0/1
I
2
C accessible debug capabilities for manufacturing tests