SLLSEP2D August   2015  – May 2017 TUSB320HI , TUSB320LI

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
      1. 7.1.1 Cables, Adapters, and Direct Connect Devices
        1. 7.1.1.1 USB Type-C Receptacles and Plugs
        2. 7.1.1.2 USB Type-C Cables
        3. 7.1.1.3 Legacy Cables and Adapters
        4. 7.1.1.4 Direct Connect Devices
        5. 7.1.1.5 Audio Adapters
    2. 7.2 Feature Description
      1. 7.2.1 Port Role Configuration
        1. 7.2.1.1 Downstream Facing Port (DFP) - Source
        2. 7.2.1.2 Upstream Facing Port (UFP) - Sink
        3. 7.2.1.3 Dual Role Port (DRP)
      2. 7.2.2 Type-C Current Mode
      3. 7.2.3 Accessory Support
        1. 7.2.3.1 Audio Accessory
        2. 7.2.3.2 Debug Accessory
      4. 7.2.4 I2C and GPIO Control
      5. 7.2.5 VBUS Detection
    3. 7.3 Device Functional Modes
      1. 7.3.1 Unattached Mode
      2. 7.3.2 Active Mode
      3. 7.3.3 Dead Battery Mode
      4. 7.3.4 Shutdown Mode
    4. 7.4 Programming
    5. 7.5 Register Maps
      1. 7.5.1 CSR Registers (address = 0x00 - 0x07)
      2. 7.5.2 CSR Registers (address = 0x08)
      3. 7.5.3 CSR Registers (address = 0x09)
      4. 7.5.4 CSR Registers (address = 0x0A)
      5. 7.5.5 CSR Registers (address = 0x45)
      6. 7.5.6 CSR Registers (address = 0xA0)
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 DRP in I2C Mode
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DFP in I2C Mode
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 UFP in I2C Mode
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
    3. 8.3 Initialization Set Up
      1. 8.3.1 TUSB320L Initialization Procedure
      2. 8.3.2 TUSB320H Initialization Procedure
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related Links
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7 Detailed Description

7.1 Overview

The USB Type-C ecosystem operates around a small form factor connector and cable that is flippable and reversible. Because of the nature of the connector, a scheme is needed to determine the connector orientation. Additional schemes are needed to determine when a USB port is attached and the acting role of the USB port (DFP, UFP, DRP), as well as to communicate Type-C current capabilities. These schemes are implemented over the CC pins according to the USB Type-C specifications. The TUSB320 devices provide Configuration Channel (CC) logic for determining USB port attach and detach, role detection, cable orientation, and Type-C current mode. The TUSB320 devices also contains several features such as mode configuration and low standby current which make these devices ideal for source or sinks in USB2.0 applications.

TUSB320HI TUSB320LI fbd_sllsen9_320.gif Figure 2. Functional Block Diagram of TUSB320

7.1.1 Cables, Adapters, and Direct Connect Devices

Type-C Specification 1.1 defines several cables, plugs and receptacles to be used to attach ports. The TUSB320 device supports all cables, receptacles, and plugs. The TUSB320 device does not support e-marking.

7.1.1.1 USB Type-C Receptacles and Plugs

Below is list of Type-C receptacles and plugs supported by the TUSB320 device:

  • USB Type-C receptacle for USB2.0 platforms and devices
  • USB full-featured Type-C plug
  • USB2.0 Type-C plug

7.1.1.2 USB Type-C Cables

Below is a list of Type-C cables types supported by the TUSB320 device:

  • USB full-featured Type-C cable
  • USB2.0 Type-C cable with USB2.0 plug
  • Captive cable on remote device with either a USB full-featured plug or USB2.0 plug

7.1.1.3 Legacy Cables and Adapters

The TUSB320 device supports legacy cable adapters as defined by the Type-C Specification. The cable adapter must correspond to the mode configuration of the TUSB320 device.

TUSB320HI TUSB320LI legacy_adpt_imp_crct_sllsen9_320.gif Figure 3. Legacy Adapter Implementation Circuit

7.1.1.4 Direct Connect Devices

The TUSB320 device supports the attaching and detaching of a direct-connect device.

7.1.1.5 Audio Adapters

Additionally, the TUSB320 device supports audio adapters for audio accessory mode, including:

  • Passive Audio Adapter
  • Charge Through Audio Adapter

7.2 Feature Description

7.2.1 Port Role Configuration

The TUSB320 device can be configured as a downstream facing port (DFP), upstream facing port (UFP), or dualrole port (DRP) using the tri-level PORT pin. The PORT pin should be pulled high to VDD using a pullup resistance, low to GND or left as floated on the PCB to achieve the desired mode. This flexibility allows the TUSB320 device to be used in a variety of applications. The TUSB320 device samples the PORT pin after reset and maintains the desired mode until the TUSB320 device is reset again. The port role can also be selected through I2C registers. Table 1 lists the supported features in each mode:

Table 1. Supported Features for the TUSB320 Device by Mode

PORT PIN HIGH
(DFP ONLY)		 LOW
(UFP ONLY)		 NC
(DRP)
SUPPORTED FEATURES
Port attach and detach Yes Yes Yes
Cable orientation (through I2C) Yes Yes Yes
Current advertisement Yes - Yes (DFP)
Current detection - Yes Yes (UFP)
Accessory modes (audio and debug) Yes Yes Yes
Try.SRC - - Yes
Try.SNK - - Yes
Active cable detection Yes - Yes (DFP)
I2C / GPIO Yes Yes Yes
Legacy cables Yes Yes Yes
VBUS detection - Yes Yes (UFP)

7.2.1.1 Downstream Facing Port (DFP) - Source

The TUSB320 device can be configured as a DFP only by pulling the PORT pin high through a resistance to VDD. In DFP mode, the TUSB320 device constantly presents Rps on both CC. In DFP mode, the TUSB320 device initially advertises default USB Type-C current. The Type-C current can be adjusted through I2C if the system needs to increase the amount advertised. The TUSB320 device adjusts the Rps to match the desired Type-C current advertisement. In GPIO mode, the TUSB320 device only advertises default Type-C current.

When configured as a DFP, the TUSB320 can operate with older USB Type-C 1.0 devices except for a USB Type-C 1.0 DRP device. A USB Type-C 1.1 compliant DFP can not connect to a Type-C 1.0 DRP. Because the TUSB320 is compliant to Type-C 1.1, the TUSB320 can not operate with a USB Type-C 1.0 DRP device. This limitation is a result of a backwards compatibility problem between USB Type-C 1.1 DFP and a USB Type-C 1.0 DRP.

7.2.1.2 Upstream Facing Port (UFP) - Sink

The TUSB320 device can be configured as a UFP only by pulling the PORT pin low to GND. In UFP mode, the TUSB320 device constantly presents pulldown resistors (Rd) on both CC pins. The TUSB320 device monitors the CC pins for the voltage level corresponding to the Type-C mode current advertisement by the connected DFP. The TUSB320 device debounces the CC pins and wait for VBUS detection before successfully attaching. As a UFP, the TUSB320 device detects and communicates the advertised current level of the DFP to the system through the OUT1 and OUT2 GPIOs (if in GPIO mode) or through the I2C CURRENT_MODE_DETECT register one time in the Attached.SNK state.

7.2.1.3 Dual Role Port (DRP)

The TUSB320 device can be configured to operate as a DRP when the PORT pin is left floated on the PCB. In DRP mode, the TUSB320 device toggles between operating as a DFP and a UFP. When functioning as a DFP in DRP mode, the TUSB320 device complies with all operations as defined for a DFP according to the Type-C Specification. When presenting as a UFP in DRP mode, the TUSB320 device operates as defined for a UFP according to the Type-C Specification.

The TUSB320 supports two optional Type-C DRP features called Try.SRC and Try.SNK. Products supporting dual-role functionality may have a need to be a source (DFP) or a sink (UFP) when connected to another dual-role capable product. For example, a dual-role capable notebook may desire to be a source when connected to a tablet, or a cell phone would prefer to be a sink when connected to a notebook or tablet. When standard DRP products (products which don’t support either Try.SRC or Try.SNK) are connected together, the role (UFP or DFP) outcome is not predetermined. These two optional DRP features provide a means for dual-role capable products to connect to another dual-role capable product in the role desired. Try.SRC and Try.SNK are only available when TUSB320 is configured in I2C mode. When operating in GPIO mode, the TUSB320 will always operate as a standard DRP.

The TUSB320’s Try.SRC feature provides a means for a DRP product to connect as a DFP when connected to another DRP product that doesn’t implement Try.SRC. When two products which implement Try.SRC are connected together, the role outcome of either UFP or DFP is the same as a standard DRP. Try.SRC is enabled by changing I2C register SOURCE_PREF to 2’b11. Once this register is changed to 2’b11, the TUSB320 will always attempt to connect as a DFP when attached to another DRP capable device.

The TUSB320’s Try.SNK feature provides a method for a DRP product to connect as a UFP when connected to another DRP product that doesn’t implement Try.SNK. When two products which implement Try.SNK are connected together, the role outcome of either UFP or DFP is the same as a standard DRP. Try.SNK is enabled by changing I2C register SOURCE_PREF to 2’b01. Once this register is changed to 2’b01, the TUSB320 will always attempt to connect as a UFP when attached to another DRP capable device.

7.2.2 Type-C Current Mode

When a valid cable detection and attach have been completed, the DFP has the option to advertise the level of Type-C current a UFP can sink. The default current advertisement for the TUSB320 device is max of 500 mA (for USB2.0) or max of 900 mA (for USB3.1). If a higher level of current is available, the I2C registers can be written to provide medium current at 1.5 A or high current at 3 A. When the CURRENT_MODE_ADVERTISE register has been written to advertise higher than default current, the DFP adjusts the Rps for the specified current level. If a DFP advertises 3 A, system designer must ensure that the VDD of the TUSB320 device is 3.5 V or greater. Table 2 lists the Type-C current advertisements in GPIO an I2C modes.

Table 2. Type-C Current Advertisement for GPIO and I2C Modes

TYPE-C CURRENT GPIO MODE (ADDR PIN IN NC) I2C MODE (ADDR PIN H, L)
UFP (PORT PIN L) DFP (PORT PIN H) UFP DFP
Default max of 500 mA (USB2.0)
max of 900 mA (USB3.1) 		Current mode detected and output through OUT1 / OUT2 Only advertisement Current mode detected and read through I2C register I2C register default is 500 or 900 mA (max)
Medium - 1.5 A (max) N/A Advertisement selected through writing I2C register
High - 3 A (max)

7.2.3 Accessory Support

The TUSB320 device supports audio and debug accessories in UFP, DFP mode and DRP mode. Audio and debug accessory support is provided through reading of I2C registers. Audio accessory is also supported through GPIO mode with INT_N/OUT3 pin (audio accessory is detected when INT_N/OUT3 pin is low).

7.2.3.1 Audio Accessory

Audio accessory mode is supported through two types of adapters. First, the passive audio adapter can be used to convert the Type-C connector into an audio port. In order to effectively detect the passive audio adapter, the TUSB320 device must detect a resistance < Ra on both of the CC pins.

Secondly, a charge through audio adapter may be used. The primary difference between a passive and charge through adapter is that the charge through adapter supplies 500 mA of current over VBUS. The charge through adapter contains a receptacle and a plug. The plug acts as a DFP and supply VBUS when the plug detects a connection.

When the TUSB320 device is configured in GPIO mode, OUT3 pin determines if an audio accessory is connected. When an audio accessory is detected, the OUT3 pin is pulled low.

7.2.3.2 Debug Accessory

Debug is an additional state supported by USB Type-C. The specification does not define a specific user scenario for this state, but it is important because the end user could use debug accessory mode to enter a test state for production specific to the application. Charge through debug accessory is not supported by TUSB320 when in DRP or UFP mode.

7.2.4 I2C and GPIO Control

The TUSB320 device can be configured for I2C communication or GPIO outputs using the ADDR pin. The ADDR pin is a tri-level control pin. When the ADDR pin is left floating (NC), the TUSB320 device is in GPIO output mode. When the ADDR pin is pulled high or pulled low, the TUSB320 device is in I2C mode.

All outputs for the TUSB320 device are open drain configuration.

The OUT1 and OUT2 pins are used to output the Type-C current mode when in GPIO mode. Additionally, the OUT3 pin is used to communicate the audio accessory mode in GPIO mode. Table 3 lists the output pin settings. See for more information.

Table 3. Simplified Operation for OUT1 and OUT2

OUT1 OUT2 ADVERTISEMENT
H H Default Current in Unattached State
H L Default Current in Attached State
L H Medium Current (1.5 A) in Attached State
L L High Current (3.0 A) in Attached State

When operating in I2C mode, the TUSB320 device uses the SCL and SDA lines for clock and data and the INT_N pin to communicate a change in I2C registers, or an interrupt, to the system. The INT_N pin is pulled low when the TUSB320 device updates the registers with new information. The INT_N pin is open drain. The INTERRUPT_STATUS register will be set when the INT_N pin is pulled low. To clear the INTERRUPT_STATUS register, the end user writes to I2C.

When operating in GPIO mode, the OUT3 pin is used in place of the INT_N pin to determine if an audio accessory is detected and attached. The OUT3 pin is pulled low when an audio accessory is detected.

NOTE

When using the 3.3 V supply for I2C, the end user must ensure that the VDD is 3 V and above. Otherwise the I2C may back power the device.

7.2.5 VBUS Detection

The TUSB320 device supports VBUS detection according to the Type-C Specification. VBUS detection is used to determine the attachment and detachment of a UFP and to determine the entering and exiting of accessary modes. VBUS detection is also used to successfully resolve the role in DRP mode.

The system VBUS voltage must be routed through a 900-kΩ resistor to the VBUS_DET pin on the TUSB320 device if the PORT pin is configured as a DRP or a UFP. If the TUSB320 device is configured as a DFP and only ever used in DFP mode, the VBUS_DET pin can be left unconnected.

7.3 Device Functional Modes

The TUSB320 device has four functional modes. Table 4 lists these modes:

Table 4. USB Type-C States According to TUSB320 Functional Modes

MODES GENERAL BEHAVIOR PORT PIN STATES(1)
Unattached USB port unattached. ID, PORT operational. I2C on. CC pins configure according to PORT pin. UFP Unattached.SNK
AttachWait.SNK
DRP Toggle Unattached.SNK → Unattached.SRC
AttachedWait.SRC or AttachedWait.SNK
DFP Unattached.SRC
AttachWait.SRC
Active USB port attached. All GPIOs operational. I2C on. UFP Attached.SNK
Audio accessory
Debug accessory
DRP Attached.SNK
Attached.SRC
Audio accessory
Debug accessory
DFP Attached.SRC
Audio accessory
Debug accessory
Dead battery No operation.
VDD not available.		 UFP/DRP/DFP Default device state to UFP/SNK with Rd.
Shutdown VDD available.
TUSB320L's EN_N pin high.
TUSB320H's EN pin low.		 UFP/DRP/DFP Default device state to UFP/SNK with Rd.
(1) Required; not in sequential order.

7.3.1 Unattached Mode

Unattached mode is the primary mode of operation for the TUSB320 device, because a USB port can be unattached for a lengthy period of time. In unattached mode, VDD is available, and all IOs and I2C are operational. After the TUSB320 device is powered up, the part enters unattached mode until a successful attach has been determined. Initially, right after power up, the TUSB320 device comes up as an Unattached.SNK. The TUSB320 device checks the PORT pin and operates according to the mode configuration. The TUSB320 device toggles between the UFP and the DFP if configured as a DRP. In unattached mode, I2C can be used to change the mode configuration or port role if the board configuration of the PORT pin is not the desired mode. Writing to the I2C MODE_SELECT register can override the PORT pin in unattached mode. The PORT pin is only sampled at reset (TUSB320L's EN_N high to low transition or TUSB320H's EN low to high transition), after I2C_SOFT_RESET, or power up. I2C must be used after reset to change the device mode configuration.

7.3.2 Active Mode

Active mode is defined as the port being attached. In active mode, all GPIOs are operational, and I2C is read / write (R/W). When in active mode, the TUSB320 device communicates to the AP that the USB port is attached. This happens through the ID pin if TUSB320 is configured as a DFP or DRP connect as source. If TUSB320 is configured as a UFP or a DRP connected as a sink, the OUT1/OUT2 and INT_N/OUT3 pins are used. The TUSB320 device exits active mode under the following conditions:

  • Cable unplug
  • VBUS removal if attached as a UFP
  • Dead battery; system battery or supply is removed
  • TUSB320L EN_N pin floated or pulled high
  • TUSB320H EN pin floated or pulled low.

During active mode, I2C be used to change the mode configuration. This can be done by following the sequence below. This same sequence is valid when TUSB320 is in unattached mode.

  • Set DISABLE_TERM register (address 0x0A bit 0) to a 1'b1.
  • Change MODE_SELECT register (address 0x0A bits 5:4) to desired mode of operation.
  • Wait 5 ms.
  • Clear DISABLE_TERM register (address 0x0A bit 0) to 1'b0.

7.3.3 Dead Battery Mode

During dead battery mode, VDD is not available. CC pins always default to pulldown resistors in dead battery mode. Dead battery mode means:

  • TUSB320 in UFP with 5.1-kΩ ± 20% Rd; cable connected and providing charge
  • TUSB320 in UFP with 5.1-kΩ ± 20% Rd; nothing connected (application could be off or have a discharged battery)

NOTE

When VDD is off, the TUSB320 non-failsafe pins (VBUS_DET, ADDR, PORT, ID, OUT[3:1] pins) could back-drive the TUSB320 device if not handled properly. When necessary to pull these pins up, it is recommended to pullup PORT, ADDR, INT_N/OUT3, and ID to the device’s VDD supply. The VBUS_DET must be pulled up to VBUS through a 900-kΩ resistor.

7.3.4 Shutdown Mode

Shutdown mode for TUSB320L device is defined as follows:

  • Supply voltage available and EN_N pin is pulled high or floating.
  • EN_N pin has internal pullup resistor.
  • The TUSB320L device is off, but still maintains the Rd on the CC pins

Shutdown mode for TUSB320H device is defined as follows:

  • Supply voltage available and EN pin is pulled low or floating.
  • EN pin has internal pulldown resistor.
  • The TUSB320H device is off, but still maintains the Rd on the CC pins

7.4 Programming

For further programmability, the TUSB320 device can be controlled using I2C. The TUSB320 device local I2C interface is available for reading/writing after TI2C_EN when the device is powered up. The SCL and SDA terminals are used for I2C clock and I2C data respectively. If I2C is the preferred method of control, the ADDR pin must be set accordingly.

Table 5. TUSB320 I2C Addresses

TUSB320 I2C Target Address
ADDR pin Bit 7 (MSB) Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 (W/R)
H 1 1 0 0 1 1 1 0/1
L 1 0 0 0 1 1 1 0/1

The following procedure should be followed to write to TUSB320 I2C registers:

  1. The master initiates a write operation by generating a start condition (S), followed by the TUSB320 7-bit address and a zero-value R/W bit to indicate a write cycle
  2. The TUSB320 device acknowledges the address cycle
  3. The master presents the sub-address (I2C register within the TUSB320 device) to be written, consisting of one byte of data, MSB-first
  4. The TUSB320 device acknowledges the sub-address cycle
  5. The master presents the first byte of data to be written to the I2C register
  6. The TUSB320 device acknowledges the byte transfer
  7. The master may continue presenting additional bytes of data to be written, with each byte transfer completing with an acknowledge from the TUSB320 device
  8. The master terminates the write operation by generating a stop condition (P)

The following procedure should be followed to read the TUSB320 I2C registers:

  1. The master initiates a read operation by generating a start condition (S), followed by the TUSB320 7-bit address and a one-value R/W bit to indicate a read cycle
  2. The TUSB320 device acknowledges the address cycle
  3. The TUSB320 device transmits the contents of the memory registers MSB-first starting at register 00h or last read sub-address+1. If a write to the T I2C register occurred prior to the read, then the TUSB320 device starts at the sub-address specified in the write.
  4. The TUSB320 device waits for either an acknowledge (ACK) or a not-acknowledge (NACK) from the master after each byte transfer; the I2C master acknowledges reception of each data byte transfer
  5. If an ACK is received, the TUSB320 device transmits the next byte of data
  6. The master terminates the read operation by generating a stop condition (P)

The following procedure should be followed for setting a starting sub-address for I2C reads:

  1. The master initiates a write operation by generating a start condition (S), followed by the TUSB320 7-bit address and a zero-value R/W bit to indicate a read cycle
  2. The TUSB320 device acknowledges the address cycle
  3. The master presents the sub-address (I2C register within the TUSB320 device) to be read, consisting of one byte of data, MSB-first
  4. The TUSB320 device acknowledges the sub-address cycle
  5. The master terminates the read operation by generating a stop condition (P)

NOTE

If no sub-addressing is included for the read procedure, then the reads start at register offset 00h and continue byte-by-byte through the registers until the I2C master terminates the read operation. If a I2C address write occurred prior to the read, then the reads start at the sub-address specified by the address write.

7.5 Register Maps

Table 6. CSR Registers

ACCESS TAG NAME MEANING
R Read The field may be read by software.
W Write The field may be written by software.
S Set The field may be set by a write of one. Writes of zeros to the field have no effect.
C Clear The field may be cleared by a write of one. Writes of zeros to the field have no effect.
U Update Hardware may autonomously update this field.
NA No Access Not accessible or not applicable.

7.5.1 CSR Registers (address = 0x00 – 0x07)

Figure 4. CSR Registers (address = 0x00 – 0x07)
7 6 5 4 3 2 1 0
DEVICE_ID
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 7. CSR Registers (address = 0x00 – 0x07)

Bit Field Type Reset Description
7:0 DEVICE_ID R For the TUSB320 device these fields return a string of ASCII characters returning TUSB320
Addresses 0x07 - 0x00 = {0x00 0x54 0x55 0x53 0x42 0x33 0x32 0x30}

7.5.2 CSR Registers (address = 0x08)

Figure 5. CSR Registers (address = 0x08)
7 6 5 4 3 2 1 0
CURRENT_MODE_ADVERTISE CURRENT_MODE_DETECT ACCESSORY_CONNECTED ACTIVE_CABLE_
DETECTION
RW RU RU RU
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 8. CSR Registers (address = 0x08)

Bit Field Type Reset Description
7:6 CURRENT_MODE_ADVERTISE

RW

00 These bits are programmed by the application to raise the current advertisement from default.

00 – Default (500 mA / 900 mA) initial value at startup

01 – Mid (1.5 A)

10 – High (3 A)

11 – Reserved

5:4 CURRENT_MODE_DETECT

RU

 00 These bits are set when a UFP determines the Type-C Current mode.

00 – Default (value at start up)

01 – Medium

10 – Charge through accessory – 500 mA

11 – High
3:1 ACCESSORY_CONNECTED

RU

 000 These bits are read by the application to determine if an accessory was attached.

000 – No accessory attached (default)

001 – Reserved

010 – Reserved

011 – Reserved

100 – Audio accessory

101 – Audio charged thru accessory

110 – Debug accessory when TUSB320 is connected as a DFP.

111 – Debug accessory when TUSB320 is connected as a UFP.
0 ACTIVE_CABLE_DETECTION RU 0 This flag indicates that an active cable has been plugged into the Type-C connector. When this field is set, an active cable is detected.

7.5.3 CSR Registers (address = 0x09)

Figure 6. CSR Registers (address = 0x09)
7 6 5 4 3 2 1 0
ATTACHED_STATE CABLE_DIR INTERRUPT_STATUS — DRP_DUTY_CYCLE DISABLE_UFP_
ACCESSORY
RU RU RCU R RW RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 9. CSR Registers (address = 0x09)

Bit Field Type Reset Description
7:6 ATTACHED_STATE

RU

 00 This is an additional method to communicate attach other than the ID pin. These bits can be read by the application to determine what was attached.

00 – Not attached (default)

01 – Attached.SRC (DFP)

10 – Attached.SNK (UFP)

11 – Attached to an accessory
5 CABLE_DIR

RU

 1 Cable orientation. The application can read these bits for cable orientation information.

0 – CC1

1 – CC2 (default)
4 INTERRUPT_STATUS

RCU

 0 The INT pin is pulled low whenever a CSR with RU in Access field changes. When a CSR change has occurred this bit should be held at 1 until the application clears it. A write of 1'b1 is required to clear this field.

0 – Clear

1 – Interrupt (When INT_N is pulled low, this bit will be 1. )

Note: SW must make sure the INTERRUPT_STATUS has been cleared to zero. Rewrites to this register are needed for the INT_N to be correctly asserted for all interrupt events.
3 Reserved R 0 Reserved
2:1 DRP_DUTY_CYCLE

RW

 00 Percentage of time that a DRP advertises DFP during tDRP

00 – 30% (default)

01 – 40%

10 – 50%

11 – 60%
0 DISABLE_UFP_ACCESSORY RW 0 Settings this field will disable UFP accessory support.

0 – UFP accessory support enabled (Default)

1 – UFP accessory support disabled

7.5.4 CSR Registers (address = 0x0A)

Figure 7. CSR Registers (address = 0x0A)
7 6 5 4 3 2 1 0
DEBOUNCE MODE_SELECT I2C_SOFT_RESET SOURCE_PREF DISABLE_TERM
RW RW RSU RW RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 10. CSR Registers (address = 0x0A)

Bit Field Type Reset Description
7:6 DEBOUNCE

RW

 00 The nominal amount of time the TUSB320 device debounces the voltages on the CC pins.

00 – 168ms (default)

01 – 118ms

10 – 134ms

11 – 152ms
5:4 MODE_SELECT

RW

 00 This register can be written to set the TUSB320 device mode operation. The ADDR pin must be set to I2C mode. If the default is maintained, the TUSB320 device operates according to the PORT pin levels and modes.

00 – Maintain mode according to PORT pin selection (default)

01 – UFP mode (unattached.SNK)

10 – DFP mode(unattached.SRC)

11 – DRP mode(start from unattached.SNK)
3 I2C_SOFT_RESET RSU 0 This resets the digital logic. The bit is self-clearing. A write of 1 starts the reset. The following registers maybe affected after setting this bit:

CURRENT_MODE_DETECT

ACTIVE_CABLE_DETECTION

ACCESSORY_CONNECTED

ATTACHED_STATE

CABLE_DIR
2:1 SOURCE_PREF RW 00 This field controls the TUSB320 behavior when configured as a DRP.

00 – Standard DRP (default)

01 – DRP will perform Try.SNK.

10 – Reserved.

11 – DRP will perform Try.SRC.
0 DISABLE_TERM RW 0 This field will disable the termination on the CC pins and transition the TUSB320's CC state machine to the Disable State.

0 – Termination enabled according to Port (Default)

1 – Termination disabled and state machine held in Disabled state.

7.5.5 CSR Registers (address = 0x45)

Figure 8. CSR Registers (address = 0x45)
7 6 5 4 3 2 1 0
— DISABLE_RD_RP —
R RW RW
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 11. CSR Registers (address = 0x45)

Bit Field Type Reset Description
7:3 Reserved R 00000 Reserved
2 DISABLE_RD_RP RW 0 When this field is set, Rd and Rp are disabled.

0 – Normal operation (default)

1 – Disable Rd and Rp
1:0 Reserved RW 00 For TI internal use only. Do not change default value.

7.5.6 CSR Registers (address = 0xA0)

Figure 9. CSR Registers (address = 0xA0)
7 6 5 4 3 2 1 0
REVISION
R
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 12. CSR Registers (address = 0xA0)

Bit Field Type Reset Description
7:0 REVISION R 0x01 Revision of TUSB320. Defaults to 0x01.