SLLSEO5C October   2015  – May 2017 TUSB322I

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Cables, Adapters, and Direct Connect Devices
        1. 7.3.1.1 USB Type-C Receptacles and Plugs
        2. 7.3.1.2 USB Type-C Cables
        3. 7.3.1.3 Legacy Cables and Adapters
        4. 7.3.1.4 Direct Connect Devices
        5. 7.3.1.5 Audio Adapters
      2. 7.3.2 Port Role Configuration
        1. 7.3.2.1 Downstream Facing Port (DFP) - Source
        2. 7.3.2.2 Upstream Facing Port (UFP) - Sink
        3. 7.3.2.3 Dual Role Port (DRP)
      3. 7.3.3 Type-C Current Mode
      4. 7.3.4 Accessory Support
        1. 7.3.4.1 Audio Accessory
        2. 7.3.4.2 Debug Accessory
      5. 7.3.5 I2C and GPIO Control
      6. 7.3.6 VBUS Detection
      7. 7.3.7 Cable Orientation and External MUX Control
      8. 7.3.8 VCONN Support for Active Cables
    4. 7.4 Device Functional Modes
      1. 7.4.1 Unattached Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 Shutdown Mode
      4. 7.4.4 Dead Battery Mode
    5. 7.5 Programming
    6. 7.6 Register Maps
      1. 7.6.1 CSR Registers
        1. 7.6.1.1 Device Identification Register (offset = 0x07 through 0x00) [reset = 0x00, 0x54, 0x55, 0x53, 0x42, 0x33, 0x32, 0x32]
        2. 7.6.1.2 Connection Status Register (offset = 0x08) [reset = 0x00]
        3. 7.6.1.3 Connection Status and Control Register (offset = 0x09) [reset = 0x20]
        4. 7.6.1.4 General Control Register (offset = 0x0A) [reset = 0x00]
        5. 7.6.1.5 Device Revision Register (offset = 0xA0) [reset = 0x02]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 DRP in I2C Mode
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DFP in I2C Mode
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 UFP in I2C Mode
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
    3. 8.3 Initialization Set Up
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

8.1 Application Information

The TUSB322I device is a Type-C configuration channel logic and port controller. The TUSB322I device can detect when a Type-C device is attached, what type of device is attached, the orientation of the cable, and power capabilities (both detection and broadcast). The TUSB322I device can be used in a source application (DFP) or in a sink application (UFP).

8.2 Typical Application

8.2.1 DRP in I2C Mode

Figure 8 shows the TUSB322I device configured as a DRP in I2C mode.

TUSB322I sllseo5_322_schematic.gif Figure 8. DRP in I2C Mode Schematic

8.2.1.1 Design Requirements

For the design example, use the parameters listed in Table 12.

Table 12. Design Requirements for DRP in I2C Mode

DESIGN PARAMETER VALUE
VDD (4.5 to 5.5 V) 5 V
Mode (I2C or GPIO) I2C
ADDR pin must be pulled down or pulled up
I2C address (0x67 or 0x47) 0x47
ADDR pin must be pulled low or tied to GND
Type-C port type (UFP, DFP, or DRP) DRP
MODE_SELECT register = 2'b00.
VCONN Support Yes

8.2.1.2 Detailed Design Procedure

The TUSB322I device supports a VDD in the range of 4.5 V to 5.5 V. In this particular use case, 5 V is connected to the VDD pin. Because VCONN support is required for a DRP, the 5 V on VDD meets the USB Type-C VCONN requirement of 4.75 V to 5.5 V. A 100-nF capacitor is placed near VDD. Also, a 100-µF capacitor is used to meet the USB Type-C bulk capacitance requirement of 10 µF to 220 µF.

The TUSB322I device is placed into I2C mode by either pulling the ADDR pin high or low. In this case, the ADDR pin is tied to GND which results in a I2C address of 0x47. The SDA and SCL must be pulled up to either 1.8 V or 3.3 V. When pulled up to 3.3 V, the VDD supply must be at least 3 V to keep from back-driving the I2C interface.

The INT_N/OUT3 pin is used to notify the PMIC when a change in the TUSB322I I2C registers occurs. This pin is an open drain output and requires an external pullup resistor. The pin should be pulled up to VDD using a 200-kΩ resistor.

The ID pin is used to indicate when a connection has occurred if the TUSB322I device is a DFP while configured for DRP. An OTG USB controller can use this pin to determine when to operate as a USB Host or USB Device. When this pin is driven low, the OTG USB controller functions as a host and then enables VBUS. The Type-C standard requires that a DFP not enable VBUS until the VBUS is in the Attached.SRC state. If the ID pin is not low but VBUS is detected, then the OTG USB controller functions as a device. The ID pin is open drain output and requires an external pullup resistor. The ID pin should be pulled up to VDD using a 200-kΩ resistor.

The DIR pin is used to control the mux for connecting the USB3 SS signals to the appropriate pins on the USB Type-C receptacle. In this particular case, a HD3SS3212 is used as the mux. To minimize crossing in routing the USB3 SS signals to the USB Type C connector, the connection of CC1 and CC2 to the TUSB322I is swapped. When swapping the CC1 and CC2 connection, the CABLE_DIR register will also be reversed (0 = CC2 and 1 = CC1).

The VBUS_DET pin must be connected through a 900-kΩ resistor to VBUS on the Type-C that is connected. This large resistor is required to protect the TUSB322I device from large VBUS voltage that is possible in present day systems. This resistor along with internal pulldown keeps the voltage observed by the TUSB322I device in the recommended range.

The USB2 specification requires the bulk capacitance on VBUS based on UFP or DFP. When operating the TUSB322I device in a DRP mode, it alternates between UFP and DFP. If the TUSB322I device connects as a UFP, the large bulk capacitance must be removed.

Table 13. USB2 Bulk Capacitance Requirements

PORT CONFIGURATION MIN MAX UNIT
Downstream facing port (DFP) 120 µF
Upstream facing port (UFP) 1 10 µF

8.2.1.3 Application Curves

TUSB322I DRP_appcurve_sllsen9_320.gif Figure 9. Application Curve for DRP in I2C Mode

8.2.2 DFP in I2C Mode

Figure 10 shows the TUSB322I device configured as a DFP in I2C mode.

TUSB322I sllseo5_322_schematic.gif Figure 10. DFP in I2C Mode Schematic

8.2.2.1 Design Requirements

For the design example, use the parameters listed in Table 14:

Table 14. Design Requirements for DFP in I2C Mode

DESIGN PARAMETER VALUE
VDD (4.5 V to 5.5 V) 5 V
Mode (I2C or GPIO) I2C
ADDR pin must be pulled down or pulled up
I2C address (0x61 or 0x60) 0x47
ADDR pin must be pulled low or tied to GND
Type-C port type (UFP, DFP, or DRP) DFP
MODE_SELECT = 2'b10
VCONN Support Yes

8.2.2.2 Detailed Design Procedure

The TUSB322I device supports a VDD in the range of 4.5 V to 5.5 V. In this particular case, VDD is set to 5 V. A 100-nF capacitor is placed near VDD. Also, a 100-µF capacitor is used to meet the USB Type-C bulk capacitance requirement of 10 µF to 220 µF.

The TUSB322I device is placed into I2C mode by either pulling the ADDR pin high or low. In this particular case, the ADDR pin is tied to GND which results in a I2C address of 0x47. The SDA and SCL must be pulled up to either 1.8 V or 3.3 V. When pulled up to 3.3 V, the VDD supply must be at least 3 V to keep from back-driving the I2C interface.

The INT_N/OUT3 pin is used to notify the PMIC when a change in the TUSB322I I2C registers occurs. This pin is an open drain output and requires an external pullup resistor. The pin should be pulled up to VDD using a 200-kΩ resistor.

The DIR pin is used to control the mux for connecting the USB3 SS signals to the appropriate pins on the USB Type-C receptacle. In this particular case, a HD3SS3212 is used as the mux. To minimize crossing in routing the USB3 SS signals to the USB Type C connector, the connection of CC1 and CC2 to the TUSB322I is swapped. When swapping the CC1 and CC2 connection, the CABLE_DIR register will also be reversed (0 = CC2 and 1 = CC1).

The Type-C port mode is determined by the state of the MODE_SELECT register. When the MODE_SELECT register is 2'b10, the TUSB322I device is in DFP mode. The TUSB322I will exit the DFP mode if the MODE_SELECT register is changed, I2C_SOFT_RESET is set, or EN_N pin is transitioned from high to low.

The VBUS_DET pin must be connected through a 900-kΩ resistor to VBUS on the Type-C that is connected. This large resistor is required to protect the TUSB322I device from large VBUS voltage that is possible in present day systems. This resistor along with internal pulldown keeps the voltage observed by the TUSB322I device in the recommended range.

The USB2 specification requires the bulk capacitance on VBUS based on UFP or DFP. When operating the TUSB322I device in a DFP mode, a bulk capacitance of at least 120 µF is required. In this particular case, a 150-µF capacitor was chosen.

8.2.2.3 Application Curves

TUSB322I DFP_appcurve_sllsen9_320.gif Figure 11. Application Curve for DFP in I2C Mode

8.2.3 UFP in I2C Mode

Figure 12 shows the TUSB322I device configured as a UFP in I2C mode.

TUSB322I sllseo5_322_schematic.gif Figure 12. UFP in I2C Mode Schematic

8.2.3.1 Design Requirements

For the design example, use the parameters listed in Table 15:

Table 15. Design Requirements for UFP in I2C Mode

DESIGN PARAMETER VALUE
VDD (4.5 V to 5.5 V) 5 V
Mode (I2C or GPIO) I2C
ADDR pin must be pulled down or pulled up
I2C address (0x61 or 0x60) 0x47
ADDR pin must be pulled low or tied to GND
Type-C port type (UFP, DFP, or DRP) UFP
MODE_SELECT = 2'b01
VCONN Support No

8.2.3.2 Detailed Design Procedure

The TUSB322I device supports a VDD in the range of 4.5 V to 5.5 V. In this particular case, VDD is set to 5 V. A 100-nF capacitor is placed near VDD.

The TUSB322I device is placed into I2C mode by either pulling the ADDR pin high or low. In this case, the ADDR pin is tied to GND which results in a I2C address of 0x47. The SDA and SCL must be pulled up to either 1.8 V or 3.3 V. When pulled up to 3.3 V, the VDD supply must be at least 3 V to keep from back-driving the I2C interface.

The INT_N/OUT3 pin is used to notify the PMIC when a change in the TUSB322I I2C registers occurs. This pin is an open drain output and requires an external pullup resistor. The pin should be pulled up to VDD using a 200-kΩ resistor.

The DIR pin is used to control the mux for connecting the USB3 SS signals to the appropriate pins on the USB Type-C receptacle. In this particular case, a HD3SS3212 is used as the mux. To minimize crossing in routing the USB3 SS signals to the USB Type C connector, the connection of CC1 and CC2 to the TUSB322I is swapped. When swapping the CC1 and CC2 connection, the CABLE_DIR register will also be reversed (0 = CC2 and 1 = CC1).

The Type-C port mode is determined by the state of the MODE_SELECT register. When the MODE_SELECT register is 2'b01, the TUSB322I device is in UFP mode. The TUSB322I will exit the UFP mode if the MODE_SELECT register is changed, I2C_SOFT_RESET is set, or EN_N pin is transitioned from high to low.

The VBUS_DET pin must be connected through a 900-kΩ resistor to VBUS on the Type-C that is connected. This large resistor is required to protect the TUSB322I device from large VBUS voltage that is possible in present day systems. This resistor along with internal pulldown keeps the voltage observed by the TUSB322I device in the recommended range.

The USB2 specification requires the bulk capacitance on VBUS based on UFP or DFP. When operating the TUSB322I device in a UFP mode, a bulk capacitance between 1 µF to 10 µF is required. In this particular case, a 1-µF capacitor was chosen.

8.2.3.3 Application Curves

TUSB322I UFP_appcurve_sllsen9_320.gif Figure 13. Application Curve for UFP in I2C Mode

8.3 Initialization Set Up

The general power-up sequence for the TUSB322I device (EN_N tied to GND) is as follows:

  1. System is powered off (device has no VDD). The TUSB322I device is configured internally in UFP mode with Rds on CC pins (dead battery).
  2. VDD ramps – POR circuit.
  3. I2C supply ramps up.
  4. The TUSB322I device enters unattached.SNK and functions as a DRP. If DRP is not the desired mode of operation, then software must change MODE_SELECT register to desired mode (UFP or DFP).
  5. The TUSB322I device monitors the CC pins as a DFP and VBUS for attach as a UFP.
  6. The TUSB322I device enters active mode when attach has been successfully detected.