SLLSEO5C October   2015  – May 2017 TUSB322I

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Cables, Adapters, and Direct Connect Devices
        1. 7.3.1.1 USB Type-C Receptacles and Plugs
        2. 7.3.1.2 USB Type-C Cables
        3. 7.3.1.3 Legacy Cables and Adapters
        4. 7.3.1.4 Direct Connect Devices
        5. 7.3.1.5 Audio Adapters
      2. 7.3.2 Port Role Configuration
        1. 7.3.2.1 Downstream Facing Port (DFP) - Source
        2. 7.3.2.2 Upstream Facing Port (UFP) - Sink
        3. 7.3.2.3 Dual Role Port (DRP)
      3. 7.3.3 Type-C Current Mode
      4. 7.3.4 Accessory Support
        1. 7.3.4.1 Audio Accessory
        2. 7.3.4.2 Debug Accessory
      5. 7.3.5 I2C and GPIO Control
      6. 7.3.6 VBUS Detection
      7. 7.3.7 Cable Orientation and External MUX Control
      8. 7.3.8 VCONN Support for Active Cables
    4. 7.4 Device Functional Modes
      1. 7.4.1 Unattached Mode
      2. 7.4.2 Active Mode
      3. 7.4.3 Shutdown Mode
      4. 7.4.4 Dead Battery Mode
    5. 7.5 Programming
    6. 7.6 Register Maps
      1. 7.6.1 CSR Registers
        1. 7.6.1.1 Device Identification Register (offset = 0x07 through 0x00) [reset = 0x00, 0x54, 0x55, 0x53, 0x42, 0x33, 0x32, 0x32]
        2. 7.6.1.2 Connection Status Register (offset = 0x08) [reset = 0x00]
        3. 7.6.1.3 Connection Status and Control Register (offset = 0x09) [reset = 0x20]
        4. 7.6.1.4 General Control Register (offset = 0x0A) [reset = 0x00]
        5. 7.6.1.5 Device Revision Register (offset = 0xA0) [reset = 0x02]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 DRP in I2C Mode
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
      2. 8.2.2 DFP in I2C Mode
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 UFP in I2C Mode
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
    3. 8.3 Initialization Set Up
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

RWB Package
12-Pin X2QFN
Top View
TUSB322I 322_pinout_sllseo5.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NO.
CC1 1 I/O Type-C configuration channel signal 1
CC2 2 I/O Type-C configuration channel signal 2
VBUS_DET 3 I 5-V to 28-V VBUS input voltage. VBUS detection determines UFP attachment. One 900-kΩ external resistor required between system VBUS and VBUS_DET pin.
DIR 4 O DIR of plug. The open drain output indicates the detected plug orientation: Type-C plug position 2 (H); Type-C plug position 1 (L).
ADDR 5 I Tri-level input pin to indicate I2C address or GPIO mode:

H - I2C is enabled and I2C 7-bit address is 0x67.

NC - GPIO mode (I2C is disabled)

L - I2C is enabled and I2C 7-bit address is 0x47.

ADDR pin should be pulled up to VDD if high configuration is desired
INT_N/OUT3 6 O The INT_N/OUT3 is a dual-function pin. When used as the INT_N, the pin is an open drain output in I2C control mode and is an active low interrupt signal for indicating changes in I2C registers. When used as OUT3, the pin is in audio accessory detect in GPIO mode: no detection (H), audio accessory connection detected (L).
SDA/OUT1 7 I/O The SDA/OUT1 is a dual-function pin. When I2C is enabled (ADDR pin is high or low), this pin is the I2C communication data signal. When in GPIO mode (ADDR pin is NC), this pin is an open drain output for communicating Type-C current mode detect when the TUSB322I device is in UFP mode: default current mode detected (H); medium or high current mode detected (L).
SCL/OUT2 8 I/O The SCL/OUT2 is a dual function pin. When I2C is enabled (ADDR pin is high or low), this pin is the I2C communication clock signal. When in GPIO mode (ADDR pin is NC), this pin is an open drain output for communicating Type-C current mode detect when the TUSB322I device is in UFP mode: default or medium current mode detected (H); high current mode detected (L).
ID 9 O Open drain output; asserted low when the CC pins detect device attachment when port is a source (DFP), or dual-role (DRP) acting as source (DFP).
GND 10 G Ground
EN_N 11 I EN_N. Active low enable.
VDD 12 P Positive supply voltage