SLLSEV7E August   2016  – March 2023 TUSB546-DCI

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Supply Characteristics
    6. 6.6  DC Electrical Characteristics
    7. 6.7  AC Electrical Characteristics
    8. 6.8  Timing Requirements
    9. 6.9  Switching Characteristics
    10. 6.10 Typical Characteristics
      1.      Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 USB 3.1
      2. 7.3.2 DisplayPort
      3. 7.3.3 4-Level Inputs
      4. 7.3.4 Receiver Linear Equalization
    4. 7.4 Device Functional Modes
      1. 7.4.1 Device Configuration in GPIO Mode
      2. 7.4.2 28
      3. 7.4.3 Device Configuration In I2C Mode
      4. 7.4.4 DisplayPort Mode
      5. 7.4.5 Linear EQ Configuration
      6. 7.4.6 USB3.1 Modes
      7. 7.4.7 Operation Timing – Power Up
    5. 7.5 Programming
    6. 7.6 Register Maps
      1. 7.6.1 General Register (address = 0x0A) [reset = 00000001]
      2. 7.6.2 DisplayPort Control/Status Registers (address = 0x10) [reset = 00000000]
      3. 7.6.3 DisplayPort Control/Status Registers (address = 0x11) [reset = 00000000]
      4. 7.6.4 DisplayPort Control/Status Registers (address = 0x12) [reset = 00000000]
      5. 7.6.5 DisplayPort Control/Status Registers (address = 0x13) [reset = 00000000]
      6. 7.6.6 USB3.1 Control/Status Registers (address = 0x20) [reset = 00000000]
      7. 7.6.7 USB3.1 Control/Status Registers (address = 0x21) [reset = 00000000]
      8. 7.6.8 USB3.1 Control/Status Registers (address = 0x22) [reset = 00000100]
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 System Examples
      1. 8.3.1 USB 3.1 Only
      2. 8.3.2 USB 3.1 and 2 Lanes of DisplayPort
      3. 8.3.3 DisplayPort Only
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.4.2

Table 7-2 GPIO Configuration Control
CTL1 PINCTL0 PINFLIP PINTUSB546-DCI CONFIGURATIONVESA DisplayPort ALT MODE
DFP_D CONFIGURATION
LLLPower Down—
LLHPower Down—
LHLOne Port USB 3.1 - No Flip—
LHHOne Port USB 3.1 – With Flip—
HLL4 Lane DP - No FlipC and E
HLH4 Lane DP – With FlipC and E
HHLOne Port USB 3.1 + 2 Lane DP- No FlipD and F
HHHOne Port USB 3.1 + 2 Lane DP– With FlipD and F
Table 7-3 GPIO AUXp or AUXn to SBU1 or SBU2 Mapping
CTL1 PINFLIP PINMAPPING
HLAUXp → SBU1
AUXn → SBU2
HHAUXp → SBU2
AUXn → SBU1
L > 2 msXOpen

Table 4 Details the TUSB546-DCI’s mux routing. This table is valid for both I2C and GPIO.

Table 7-4 INPUT to OUTPUT Mapping
CTL1 PINCTL0 PINFLIP PINFROMTO
INPUT PINOUTPUT PIN
LLLNANA
LLHNANA
LHLRX1PSSRXP
RX1NSSRXN
SSTXPTX1P
SSTXNTX1N
LHHRX2PSSRXP
RX2NSSRXN
SSTXPTX2P
SSTXNTX2P
HLLDP0PRX2P
DP0NRX2N
DP1PTX2P
DP1NTX2N
DP2PTX1P
DP2NTX1N
DP3PRX1P
DP3NRX1N
HLHDP0PRX1P
DP0NRX1N
DP1PTX1P
DP1NTX1N
DP2PTX2P
DP2NTX2N
DP3PRX2P
DP3NRX2N
HHLRX1PSSRXP
RX1NSSRXN
SSTXPTX1P
SSTXNTX1N
DP0PRX2P
DP0NRX2N
DP1PTX2P
DP1NTX2N
HHHRX2PSSRXP
RX2NSSRXN
SSTXPTX2P
SSTXNTX2N
DP0PRX1P
DP0NRX1N
DP1PTX1P
DP1NTX1N