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  • TUSB564 USB TYPE-C™ DP Alt Mode 8.1 GbpsSink-Side Linear Redriver Crosspoint Switch

    • SLLSF29G October   2017  – November 2022 TUSB564

      PRODUCTION DATA  

  • CONTENTS
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  • TUSB564 USB TYPE-C™ DP Alt Mode 8.1 GbpsSink-Side Linear Redriver Crosspoint Switch
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Timing Requirements
    8. 6.8 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 USB 3.1
      2. 8.3.2 DisplayPort
      3. 8.3.3 4-Level Inputs
      4. 8.3.4 Receiver Linear Equalization
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Configuration in GPIO Mode
      2. 8.4.2 Device Configuration In I2C Mode
      3. 8.4.3 DisplayPort Mode
      4. 8.4.4 Linear EQ Configuration
      5. 8.4.5 USB3.1 Modes
      6. 8.4.6 Operation Timing – Power Up
    5. 8.5 Programming
    6. 8.6 Register Maps
      1. 8.6.1 General Register (address = 0x0A) [reset = 00000001]
      2. 8.6.2 DisplayPort Control/Status Registers (address = 0x10) [reset = 00000000]
      3. 8.6.3 DisplayPort Control/Status Registers (address = 0x11) [reset = 00000000]
      4. 8.6.4 DisplayPort Control/Status Registers (address = 0x12) [reset = 00000000]
      5. 8.6.5 DisplayPort Control/Status Registers (address = 0x13) [reset = 00000000]
      6. 8.6.6 USB3.1 Control/Status Registers (address = 0x20) [reset = 00000000]
      7. 8.6.7 USB3.1 Control/Status Registers (address = 0x21) [reset = 00000000]
      8. 8.6.8 USB3.1 Control/Status Registers (address = 0x22) [reset = 00000000]
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Support for DisplayPort UFP_D Pin Assignment E
      4. 9.2.4 PCB Insertion Loss Curves
    3. 9.3 System Examples
      1. 9.3.1 USB 3.1 Only
      2. 9.3.2 USB 3.1 and 2 Lanes of DisplayPort
      3. 9.3.3 DisplayPort Only
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Support Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information
  14. IMPORTANT NOTICE

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RNQ|40
Thermal pad, mechanical data (Package|Pins)
Orderable Information
  • sllsf29g_oa
  • sllsf29g_pm
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  • Full reading width
    • Full reading width
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DATA SHEET

TUSB564 USB TYPE-C™ DP Alt Mode 8.1 GbpsSink-Side Linear Redriver Crosspoint Switch

1 Features

  • USB Type-C™ crosspoint switch supporting
    • USB 3.1 Gen 1 + 2 DP 1.4 lanes
    • 4 DP 1.4 lanes
  • USB 3.1 Gen 1 up to 5 Gbps
  • DisplayPort 1.4 up to 8.1 Gbps (HBR3)
  • VESA DisplayPort™ alt mode UFP_D redriving crosspoint switch supporting c, d, and e pin assignments
  • Ultra-low-power architecture
  • Linear redriver with up to 12 dB equalization
  • Transparent to DisplayPort link training
  • Automatic LFPS de-emphasis control to meet USB 3.1 certification requirements
  • Configuration through GPIO or I2C
  • Hot-plug capable
  • Industrial temperature range: –40°C to 85°C (TUSB564I)
  • Commercial temperature range: 0°C to 70°C (TUSB564)
  • 4 mm × 6 mm, 0.4 mm Pitch WQFN package

2 Applications

  • Monitors
  • HDTV
  • Projectors
  • Docking stations

3 Description

The TUSB564 s a VESA USB Type-C™ Alt Mode redriving switch supporting USB 3.1 data rates up to 5 Gbps and DisplayPort 1.4 up to 8.1 Gbps for upstream facing port (Sink). The device is used for UFP_D pin assignments C, D, and E from the VESA DisplayPort Alt Mode on USB Type-C Standard.

The TUSB564 provides several levels of receive linear equalization to compensate for inter symbol interference (ISI) due to cable and board trace loss. Operates on a single 3.3-V supply and comes in a commercial temperature range and industrial temperature range.

Package Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
TUSB564 RNQ (WQFN, 40) 4.00 mm × 6.00 mm
TUSB564I
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-7F18AF4C-799C-4866-A217-416DA3E835E8-low.gifSimplified Schematics
GUID-90608D4E-FCE7-42E0-AC31-08739767240C-low.gifTUSB564 Use-Case Example

4 Revision History

Changes from Revision F (September 2019) to Revision G (November 2022)

  • Updated the numbering format for tables, figures, and cross-references throughout the documentGo
  • Added inclusive terminology throughout the data sheet Go
  • Updated the MSL level from: 2 to: 1Go

Changes from Revision E (May 2019) to Revision F (September 2019)

  • Added note to disable AUX snoop to resolve interop issues with a non-compliant AUX source.Go

Changes from Revision D (November 2018) to Revision E (May 2019)

  • Added following to pin 38 description: If I2C_EN = “F”, then this pin must be set to “F” or “0”. Go
  • Changed GLF min, typ, and max values from -1, 0, 1 to -2.5, 0.5, and 3.5 respectivelyGo
  • Added GLF_LFPS_TX1/2 parameter to AC electricalGo

Changes from Revision C (February 2018) to Revision D (November 2018)

  • Changed the RNQ pin image appearance Go
  • Changed the EN pin Description in the Pin Functions tableGo
  • Changed the HPDIN pin From: I/O To: 2 Level I Go
  • Added pull-down indicator (PD) in the I/O column on FLIP/SCL and CTL0/SDA pins Go
  • Added Junction temperature to absolute maximum ratings tableGo
  • From: Internal pull-down resistance for CTL1.  To:  Internal pull-down resistance for CTL1, CTL0, FLIP, and ENGo
  • Deleted EN from Note 1 of Table 8-8 Go

Changes from Revision B (January 2018) to Revision C (February 2018)

  • Changed the column on EN From: I To: 2 Level I (PD) Go
  • Updated AUX_SBU_OVR Description field in Table 8-15 to match Table 8-6 Go

Changes from Revision A (October 2017) to Revision B (January 2018)

  • Changed From: DP0EQ_SEL To: DP3EQ_SEL Go
  • Changed From: DP3EQ_SEL To: DP0EQ_SEL Go

Changes from Revision * (October 2017) to Revision A (October 2017)

  • Changed the device status from Advance Information to Production Data Go
  • From: UFP_D pin assignments C, and D To: UFP_D pin assignments C, D, and E Go
  • Added Note which describes AUX snoop feature is only supported in I2C mode. In GPIO mode, AUX snoop is disabled and all four lanes are enabled. Go

 
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