SLLSE76Q March 2011 – March 2024 TUSB7320 , TUSB7340
PRODUCTION DATA
This register is a read/write register and the contents of this register are aliased to the Subsystem Vendor ID and Subsystem ID Registers at PCI Offsets 2Ch and 2Eh. This register is reset by a PCI Express reset (PERST#), a GRST#, or the internally-generated power-on-reset.
PCI register offset: D0h
Register type: Read/Write
Default value: 0000 0000h
Bit No. | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
Reset State | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
Bit No. | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reset State | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
BIT | FIELD NAME | ACCESS | DESCRIPTION |
---|---|---|---|
31:16 | SubsystemID(1) | rw | Subsystem ID. The value written to this field is aliased to the Subsystem ID Register at PCI Offset 2Eh. |
15:0 | SubsystemVendorID(1) | rw | Subsystem Vendor ID. The value written to this field is aliased to the Subsystem Vendor ID Register at PCI Offset 2Ch. |