SLLSE76Q March 2011 – March 2024 TUSB7320 , TUSB7340
PRODUCTION DATA
The Serial Bus target Address register is used to indicate the address of the device being targeted by the serial bus cycle. This register also indicates if the cycle will be a read or a write cycle. Writing to this register initiates the cycle on the serial interface. This register is reset by a PCI Express reset (PERST#), a GRST#, or the internally-generated power-on-reset.
PCI register offset: B2h
Register type: Read/Write
Default value: 00h
Bit No. | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
Reset State | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
BIT | FIELD NAME | ACCESS | DESCRIPTION |
---|---|---|---|
7:1 | TARGET_ADDR(1) | rw | Serial Bus Target Address. This bit field represents the target address of a read or write transaction on the serial interface. |
0 | RW_CMD(1) | rw | Read/Write Command. This bit is used to determine if the serial bus cycle will be a read or a write cycle. 0 – A single byte write is requested. 1 – A single byte read is requested. |