SLLSF92A
February 2019 – March 2019
TUSB8044A
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Diagram
4
Revision History
5
Description (continued)
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Electrical Characteristics
7.6
Timing Requirements
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Battery Charging Features
8.3.2
USB Power Management
8.3.3
I2C Programming Support Using Internal HID to I2C Interface
8.3.3.1
SET REPORT (Output)
8.3.3.2
GET REPORT (Feature)
8.3.3.3
GET REPORT (Input)
8.3.4
USB2.0 Billboard
8.3.5
One Time Programmable (OTP) Configuration
8.3.6
Clock Generation
8.3.7
Crystal Requirements
8.3.8
Input Clock Requirements
8.3.9
Power-Up and Reset
8.4
Device Functional Modes
8.4.1
External Configuration Interface
8.4.2
I2C EEPROM Operation
8.4.3
Port Configuration
8.4.4
SMBus Slave Operation
8.5
Register Maps
8.5.1
Configuration Registers
8.5.2
ROM Signature Register
Table 10.
Bit Descriptions – ROM Signature Register
8.5.3
Vendor ID LSB Register
Table 11.
Bit Descriptions – Vendor ID LSB Register
8.5.4
Vendor ID MSB Register
Table 12.
Bit Descriptions – Vendor ID MSB Register
8.5.5
Product ID LSB Register
Table 13.
Bit Descriptions – Product ID LSB Register
8.5.6
Product ID MSB Register
Table 14.
Bit Descriptions – Product ID MSB Register
8.5.7
Device Configuration Register
Table 15.
Bit Descriptions – Device Configuration Register
8.5.8
Battery Charging Support Register
Table 16.
Bit Descriptions – Battery Charging Support Register
8.5.9
Device Removable Configuration Register
Table 17.
Bit Descriptions – Device Removable Configuration Register
8.5.10
Port Used Configuration Register
Table 18.
Bit Descriptions – Port Used Configuration Register
8.5.11
Device Configuration Register 2
Table 19.
Bit Descriptions – Device Configuration Register 2
8.5.12
USB 2.0 Port Polarity Control Register
Table 20.
Bit Descriptions – USB 2.0 Port Polarity Control Register
8.5.13
Billboard AlternateModeVdo
Table 21.
Bit Descriptions – Billboard AlternateModeVdo
8.5.14
UUID Registers
Table 22.
Bit Descriptions – UUID Byte N Register
8.5.15
Language ID LSB Register
Table 23.
Bit Descriptions – Language ID LSB Register
8.5.16
Language ID MSB Register
Table 24.
Bit Descriptions – Language ID MSB Register
8.5.17
Serial Number String Length Register
Table 25.
Bit Descriptions – Serial Number String Length Register
8.5.18
Manufacturer String Length Register
Table 26.
Bit Descriptions – Manufacturer String Length Register
8.5.19
Product String Length Register
Table 27.
Bit Descriptions – Product String Length Register
8.5.20
Device Configuration Register 3
Table 28.
Bit Descriptions – Device Configuration Register 3
8.5.21
USB 2.0 Only Port Register
Table 29.
Bit Descriptions – USB 2.0 Only Port Register
8.5.22
Billboard SVID LSB
Table 30.
Bit Descriptions – Billboard SVID LSB
8.5.23
Billboard SVID MSB
Table 31.
Bit Descriptions – Billboard SVID MSB
8.5.24
Billboard PID LSB
Table 32.
Bit Descriptions – Billboard PID LSB
8.5.25
Billboard PID MSB
Table 33.
Bit Descriptions – Billboard PID MSB
8.5.26
Billboard Configuration
Table 34.
Bit Descriptions – Billboard Configuration.
8.5.27
Billboard String1 Length
Table 35.
Bit Descriptions – Billboard String1 Length.
8.5.28
Billboard String2 Length
Table 36.
Bit Descriptions – Billboard String2 Length.
8.5.29
Serial Number String Registers
Table 37.
Bit Descriptions – Serial Number Registers
8.5.30
Manufacturer String Registers
Table 38.
Bit Descriptions – Manufacturer String Registers
8.5.31
Product String Registers
Table 39.
Bit Descriptions – Product String Byte N Register
8.5.32
Additional Feature Configuration Register
Table 40.
Bit Descriptions – Additional Feature Configuration Register
8.5.33
SMBus Device Status and Command Register
Table 41.
Bit Descriptions – SMBus Device Status and Command Register
8.5.34
Billboard String1_2
Table 42.
Bit Descriptions – Billboard String1_2
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Discrete USB Hub Product
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
Upstream Port Implementation
9.2.1.2.2
Downstream Port 1 Implementation
9.2.1.2.3
Downstream Port 2 Implementation
9.2.1.2.4
Downstream Port 3 Implementation
9.2.1.2.5
Downstream Port 4 Implementation
9.2.1.2.6
VBUS Power Switch Implementation
9.2.1.2.7
PD Controller and EEPROM Implementation
9.2.1.2.8
DisplayPort Implementation
9.2.1.2.9
Clock, Reset, and Misc
9.2.1.2.10
TUSB8044A Power Implementation
9.2.1.3
Application Curves
10
Power Supply Recommendations
10.1
TUSB8044A Power Supply
10.2
Downstream Port Power
10.3
Ground
11
Layout
11.1
Layout Guidelines
11.1.1
Placement
11.1.2
Package Specific
11.1.3
Differential Pairs
11.2
Layout Examples
11.2.1
Upstream Port
11.2.2
Downstream Port
12
Device and Documentation Support
12.1
Receiving Notification of Documentation Updates
12.2
Community Resources
12.3
Trademarks
12.4
Electrostatic Discharge Caution
12.5
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RGC|64
MPQF125F
Thermal pad, mechanical data (Package|Pins)
RGC|64
QFND515A
Orderable Information
sllsf92a_oa
sllsf92a_pm
1
Features
Four port USB 3.2 x1 Gen1 (5 Gbps) hub
USB 2.0 hub features
Multi transaction translator (MTT) hub: four transaction translators
Two asynchronous endpoint buffers per transaction translator
Supports battery charging:
Supports D+/D- divider charging port (ACP1, ACP2, and ACP3) when the upstream port is unconnected or not configured
Supports automatic mode for transition between DCP or ACP modes when the upstream port is unconnected
Supports galaxy charging
CDP mode (upstream port connected)
DCP mode (upstream port unconnected)
DCP mode complies with chinese telecommunications industry standard YD/T 1591-2009
Supports Operation as a USB 3.2 x1 Gen1 or USB 2.0 Compound Device
Supports USB billboard 1.21
Per port or ganged power switching and over-current notification inputs
Supports four external downstream ports
plus internal USB 2.0-only port for USB HID to I
2
C functionality
and USB2.0 Billboard
Internal downstream port for I
2
C control through USB HID supports high-speed, full-speed operation. Its speed matches that of the upstream port.
Supports vendor requests to read and write I
2
C and EEPROM read at 100 k
and 400 k (Default)
I
2
C master supports clock stretching
OTP ROM, Serial EEPROM or I
2
C/SMBus slave interface for custom configurations:
VID and PID
Port customizations
Manufacturer and product strings (not by OTP ROM)
Serial number (not by OTP ROM)
Provides 128-Bit Universally Unique Identifier (UUID)
Supports on-board and in-system EEPROM programming Via the USB 2.0 upstream port
Single clock input, 24-MHz crystal or oscillator
Downstream ports configurable to USB2.0 only
64-Pin QFN package (RGC)