SLDS250A December   2019  – May 2022 TUSS4440

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power-Up Characteristics
    6. 6.6  Transducer Drive
    7. 6.7  Receiver Characteristics
    8. 6.8  Echo Interrupt Comparator Characteristics
    9. 6.9  Digital I/O Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Excitation Power Supply (VDRV)
      2. 7.3.2 Burst Generation
        1. 7.3.2.1 Burst Generation Diagnostics
      3. 7.3.3 Transformer Transducer Drive
      4. 7.3.4 Analog Front End
    4. 7.4 Device Functional Modes
    5. 7.5 Programming
    6. 7.6 Register Maps
      1. 7.6.1 REG_USER Registers
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Transformer Drive Configuration Options
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Transducer Driving Voltage
          2. 8.2.1.2.2 Transducer Driving Frequency
          3. 8.2.1.2.3 Transducer Pulse Count
          4. 8.2.1.2.4 Transformer Turns Ratio
          5. 8.2.1.2.5 Transformer Saturation Current and Main Voltage Rating
        3. 8.2.1.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 Transformer Transducer Drive

The device provides burst generation by exciting the primary side of a step-up transformer connected at the OUTA / OUTB pins. The VDRV pin is used as the power supply source. Figure 7-5 shows the TUSS4440 device transformer drive block diagram when using a center-tap transformer. The drive stage in the TUSS4440 is realized as two low-side N-Channel power FETs. The current limit control block tries to drive current efficiently into the primary side of the transformer to achieve the maximum swing (set by voltage on the center tap and turn ratio of the transformer) on the secondary side. The secondary side total resistance, turn ratio, and the required peak-to-peak voltage will set the minimum value that will drive the OUTA/OUTB pin for a given set current limit. The current limit block supports multiple current levels selected by the XFMR_DRV_ILIM bits. The voltage on VDRV pin can be set as described in the Section 7.3.1 section.

GUID-E0B5ACBF-BE9D-4EC8-93A0-529B50A3A409-low.gifFigure 7-5 TUSS4440 Center-Tap transformer drive.

For a center-tap transformer configuration, the TUSS4440 will drive the low-side FETs in an out-of-phase manner. The device also supports a single primary coil transformer configuration where the FETs are driven in-phase. This is done by setting the HALF_BRG_MODE bit. In this mode, the effective current limit remains the same as set in XFMR_DRV_ILIM. Refer to Section 8 for an application diagram and information on how the polarity and state of the OUTA and OUTB pins are defined with respect to the IO1 and IO2 pin states and other register settings.

Note:

For a center-tap transformer, the voltage swing on OUTA and OUTB can be as high as 2 × VVDRV. If the center tap of the transformer is connected directly to VPWR, then it must be ensured that the maximum voltage on OUTA and OUTB pins do not go above the absolute maximum limits.