SLDS250A December 2019 – May 2022 TUSS4440
PRODUCTION DATA
The TUSS4440 supports two pulsing modes to accommodate specific system needs based on the transformer used as shown in Figure 8-2. The typical application diagram in Figure 8-1 is considered as "Case 1".
The behavior of the internal FETs of TUSS4440 is different for each configuration in Table 8-2. The relationship between the IOx pins and the state of the OUTA and OUTB pins for different register settings is shown in Table 8-2 and Table 8-3.
IO MODE 2 | ||||||
---|---|---|---|---|---|---|
START OF BURST | HALF_BRG_MODE | IO1 | IO2 | OUTA | OUTB | APPLICATION CASE |
YES | 0 | 0 | 0 | Hi-Z | Hi-Z | CASE 1, CASE 3 |
0 | 0 | 1 | Hi-Z | GND | ||
0 | 1 | 0 | GND | Hi-Z | ||
NO | 0 | 1 | 1 | Hi-Z | Hi-Z | |
YES | 1 | 0 | 0 | Hi-Z | Hi-Z | CASE 2, CASE 4 |
1 | 0 | 1 | GND | GND | ||
1 | 1 | 0 | Hi-Z | Hi-Z | ||
NO | 1 | 1 | 1 | Hi-Z | Hi-Z |
IO MODE 0, IO MODE 1, IO MODE 3 | |||||||
---|---|---|---|---|---|---|---|
START OF BURST | HALF_BRG_MODE | CMD_TRIGGER (IO MODE 0) | IO1 (IO MODE 1) | IO2 | OUTA | OUTB | APPLICATION CASE |
NO | 0 | 0 | 1 | 0 | Hi-Z | Hi-Z | CASE 1, CASE 3 |
0 | 0 | 1 | 1 | ||||
YES | 0 | 1 | 0 | 0 | Hi-Z | GND | |
0 | 1 | 0 | 1 | GND | Hi-Z | ||
NO | 1 | 0 | 1 | 0 | Hi-Z | Hi-Z | CASE 2, CASE 4 |
1 | 0 | 1 | 1 | ||||
YES | 1 | 1 | 0 | 0 | Hi-Z | Hi-Z | |
1 | 1 | 0 | 1 | GND | GND |