SLVSED2C December   2017  – November 2019 TVS0500

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Footprint Comparison
      2.      Voltage Clamp Response to 8/20 µs Surge Event
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings - JEDEC
    3. 7.3 ESD Ratings - IEC
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Reliability Testing
    5. 8.5 Device Functional Modes
      1. 8.5.1 Protection Specifications
      2. 8.5.2 Minimal Derating
      3. 8.5.3 Transient Performance
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Configuration Options
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.7 Typical Characteristics

TVS0500 D001_SLVSED2.gif
Figure 1. 8/20 µs Surge Response at 43 A
TVS0500 D003_SLVSED2.gif
f = 1 MHz, 30 mVpp, IO to GND
Figure 3. Capacitance vs Temperature Across Bias
TVS0500 D005_SLVSED2.gif
Figure 5. I/V Curve Across Temperature
TVS0500 D007_SLVSED2.gif
Figure 7. Breakdown Voltage (1 mA) vs Temperature
TVS0500 D009_SLVSED2.gif
Figure 9. Dynamic Leakage vs Signal Slew Rate across Temperature
TVS0500 D002_SLVSED2.gif
Figure 2. 8/20 µs Surge Response at 35 A Across Temperature
TVS0500 D004_SLVSED2.gif
Figure 4. Leakage Current vs Temperature at 5 V
TVS0500 D006_SLVSED2.gif
Figure 6. Forward Voltage vs Temperature
TVS0500 D008_SLVSED2.gif
Figure 8. Max Surge Current (8/20 µs) vs Temperature