SLVSED4A December   2017  – March 2018 TVS1800

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Footprint Comparison
      2.      Voltage Clamp Response to 8/20 µs Surge Event
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings - JEDEC
    3. 7.3 ESD Ratings - IEC
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
    4. 8.4 Reliability Testing
    5. 8.5 Device Functional Modes
      1. 8.5.1 Protection Specifications
      2. 8.5.2 Minimal Derating
      3. 8.5.3 Transient Performance
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
      4. 9.2.4 Configuration Options
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Receiving Notification of Documentation Updates
    2. 12.2 Community Resources
    3. 12.3 Trademarks
    4. 12.4 Electrostatic Discharge Caution
    5. 12.5 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.6 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
VRWM Reverse Stand-off Voltage -0.5 18 V
ILEAK Leakage Current Measured at VIN = VRWM, TA  = 27°C 1.2 13 nA
Measured at VIN = VRWM, TA  = 85°C 9 330 nA
Measured at VIN = VRWM, TA  = 105°C 52 1150 nA
VF Forward Voltage IIN  = 1 mA from GND to IO 0.25 0.5 0.65 V
VBR Break-down Voltage IIN  = 1 mA from IO to GND 19.5 21.3 23.8 V
VFCLAMP Forward Clamp Voltage 40 A IEC 61000-4-5 Surge (8/20 µs) from GND to IO, 27°C 1 2 5 V
VCLAMP Clamp Voltage 24 A IEC 61000-4-5 Surge (8/20 µs) from IO to GND, VIN = 0 V before surge, 27°C 22.5 23 V
40 A IEC 61000-4-5 Surge (8/20 µs) from IO to GND, VIN = 0 V before surge, 27°C 22.7 23.4 V
35 A IEC 61000-4-5 Surge (8/20 µs) from IO to GND, VIN = Vrwm before surge, TA = 125°C 23.7 24.7 V
RDYN 8/20 µs surge dynamic resistance Calculated from VCLAMP at .5*Ipp and Ipp surge current levels, 27°C 30 mΩ
CIN Input pin capacitance VIN = VRWM, f = 1 MHz, 30 mVpp, IO to GND 116 pF
SR Maximum Slew Rate 0-VRWM rising edge, sweep rise time and measure slew rate when IPK = 1 mA, 27°C 2.5 V/µs
0-VRWM rising edge, sweep rise time and measure slew rate when IPK = 1 mA, 105°C 0.7 V/µs