SBOS975 March   2019 TX7332

PRODUCTION DATA.  

  1. 1Features
  2. 2Applications
  3. 3Description
    1.     Simplified Block Diagram
  4. 4Revision History
  5. 5Description (continued)
  6. 6Device and Documentation Support
    1. 6.1 Receiving Notification of Documentation Updates
    2. 6.2 Community Resources
    3. 6.3 Trademarks
    4. 6.4 Electrostatic Discharge Caution
    5. 6.5 Glossary
  7. 7Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Features

  • TX7332 supports:
    • 32-channel three-level pulser and active transmit/receive (T/R) switch
    • Very low power on-chip beamforming mode:
      • In receive-only mode: 0.45 mW/ch
      • In transmit-receive mode: 16.4 mW/ch
      • In CW mode: 160 mW/ch
      • In global power-down mode: 0.1 mW/ch
  • Three-level pulser:
    • Maximum output voltage: ±100 V
    • Minimum output voltage: ±1 V
    • Maximum output current: 1.2 A to 0.3 A
    • Maximum clamp current: 0.5 A to 0.12 A
    • Second harmonic : –45 dBc at 5 MHz
    • CW mode jitter: 100 fs measured from 100 Hz to 20 kHz
    • CW mode close-in phase noise: -154 dBc/Hz at 1 kHz offset for 5-MHz signal
    • –3-dB bandwidth with 2-kΩ || 120-pF load
      • 20 MHz (for ±100-V supply)
      • 25 MHz (for ±70-V supply)
  • Active T/R switch with:
    • ON, OFF control signals
    • Bandwidth: 50 MHz
    • HD2: –50 dBc
    • Turnon resistance: 24 Ω
    • Turnon time: 0.5 µs
    • Turnoff time: 1.75 µs
    • Transient glitch: 50 mVPP
  • Off-chip beamformer with:
    • Jitter cleaning using synchronization feature
    • Maximum synchronization clock frequency: 200 MHz
  • On-chip beamformer with:
    • Delay resolution: one beamformer clock period
    • Maximum delay: 213 beamformer clock period
    • Maximum beamformer clock speed: 200 MHz
    • On-chip RAM to store
      • 16 delay profiles
      • 32 pattern profiles
  • High-speed (100 MHz maximum) 1.8-V and 2.5-V CMOS serial programming interface
  • Automatic thermal shutdown
  • No specific power sequencing requirement
  • Small package: 260-pin NFBGA (17 mm × 11 mm) with 0.8-mm pitch