SCES640J january   2007  – july 2023 TXS0102

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements: VCCA = 1.8 V ±0.15 V
    7. 6.7  Timing Requirements: VCCA = 2.5 V ± 0.2 V
    8. 6.8  Timing Requirements: VCCA = 3.3 V ± 0.3 V
    9. 6.9  Switching Characteristics: VCCA = 1.8 V ± 0.15 V
    10. 6.10 Switching Characteristics: VCCA = 2.5 V ± 0.2 V
    11. 6.11 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
    12. 6.12 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Architecture
      2. 8.3.2 Input Driver Requirements
      3. 8.3.3 Output Load Considerations
      4. 8.3.4 Enable and Disable
      5. 8.3.5 Pullup or Pulldown Resistors on I/O Lines
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

3 Description

This two-bit non-inverting translator is a bidirectional voltage-level translator and can be used to establish digital switching compatibility between mixed-voltage systems. It uses two separate configurable power-supply rails, with the A ports supporting operating voltages from 1.65 V to 3.6 V while it tracks the VCCA supply, and the B ports supporting operating voltages from 2.3 V to 5.5 V while it tracks the VCCB supply. This allows the support of both lower and higher logic signal levels while providing bidirectional translation capabilities between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes.

When the output-enable (OE) input is low, all I/Os are placed in the high-impedance state, which significantly reduces the power-supply quiescent current consumption.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

Package Information
PART NUMBER PACKAGE(1) BODY SIZE (NOM)
TXS0102 DCT (SSOP, 8) 2.95 mm × 2.80 mm
DCU (VSSOP, 8) 2.30 mm × 2.00 mm
DQE (X2SON, 8) 1.40 mm × 1.00 mm
DQM (X2SON, 8) 1.80 mm × 1.20 mm
YZP (DSBGA, 8) 1.90 mm × 0.90 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-1344A215-150A-435E-8008-06D7A8FEFFEB-low.gif Typical Application Block Diagram for TXS0102