SCES968 June   2024 TXS0104V-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information (PW, BQA, RUT)
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, VCCA = 1.8 ± 0.15V
    7. 5.7  Switching Characteristics, VCCA = 2.5 ± 0.2V
    8. 5.8  Switching Characteristics, VCCA = 3.3 ± 0.3V
    9. 5.9  Switching Characteristics: Tsk, TMAX
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Load Circuits
    2. 6.2 Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Architecture
      2. 7.3.2 Input Driver Requirements
      3. 7.3.3 Power Up
      4. 7.3.4 Enable and Disable
      5. 7.3.5 Pullup and Pulldown Resistors on I/O Lines
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • PW|14
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.1 Architecture

The TXS0104V-Q1 architecture (see Figure 7-1) does not require a direction-control signal to control the direction of data flow from A to B or from B to A.

TXS0104V-Q1 Architecture of a TXS0104V-Q1 CellFigure 7-1 Architecture of a TXS0104V-Q1 Cell

Each A-port I/O has an internal 10kΩ pullup resistor to VCCA, and each B-port I/O has an internal 10kΩ pullup resistor to VCCB. The output one-shots detect rising edges on the A or B ports. During a rising edge, the one-shot turns on the PMOS transistors (T1 and T2) for a short duration which speeds up the low-to-high transition.