SCES861G June   2015  – December 2024 TXS0108E-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics: TA = –40°C to 125°C
    6. 5.6  Timing Requirements: VCCA = 1.5V ± 0.1 V
    7. 5.7  Timing Requirements: VCCA = 1.8V ± 0.15V
    8. 5.8  Timing Requirements: VCCA = 2.5V ± 0.2V
    9. 5.9  Timing Requirements: VCCA = 3.3V ± 0.3V
    10. 5.10 Switching Characteristics: VCCA = 1.5V ± 0.1V
    11. 5.11 Switching Characteristics: VCCA = 1.8V ± 0.15V
    12. 5.12 Switching Characteristics: VCCA = 2.5V ± 0.2V
    13. 5.13 Switching Characteristics: VCCA = 3.3V ± 0.3V
    14. 5.14 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Load Circuits
    2. 6.2 Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Architecture
      2. 7.3.2 Input Driver Requirements
      3. 7.3.3 Output Load Considerations
      4. 7.3.4 Enable and Disable
      5. 7.3.5 Pull-up or Pull-down Resistors on I/O Lines
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1.      Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RKS|20
  • DGS|20
  • PW|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.3 Output Load Considerations

TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading and so that proper one-shot triggering takes place. PCB signal trace-lengths should be kept short enough such that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity by allowing any reflection to see a low impedance at the driver. The one-shot circuits have been designed to stay on for approximately 30ns. The maximum capacitance of the lumped load that can be driven also depends directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal is driven fully to the positive rail. The one-shot duration has been set to best optimize trade-offs between dynamic ICC, load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add to the capacitance of the TXS0108E-Q1 output. Therefore, TI recommends that this lumped-load capacitance is considered to avoid one-shot retriggering, bus contention, output signal oscillations, or other adverse system-level affects.