SCES958B July   2023  – April 2024 TXV0108-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics
    6. 5.6  Switching Characteristics, VCCA = 1.2 ± 0.06 V
    7. 5.7  Switching Characteristics, VCCA = 1.8 ± 0.15 V
    8. 5.8  Switching Characteristics, VCCA = 2.5 ± 0.2 V
    9. 5.9  Switching Characteristics, VCCA = 3.3 ± 0.3 V
    10. 5.10 Typical Characteristics
  7. 6 Parameter Measurement Information
    1. 6.1 Load Circuit and Voltage Waveforms
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Balanced High-Drive CMOS Push-Pull Outputs
      2. 7.3.2 Partial Power Down (Ioff)
      3. 7.3.3 VCC Isolation and VCC Disconnect (Ioff-float)
      4. 7.3.4 Over-Voltage Tolerant Inputs
      5. 7.3.5 Negative Clamping Diodes
      6. 7.3.6 Fully Configurable Dual-Rail Design
      7. 7.3.7 Supports Timing Sensitive Translation
      8. 7.3.8 Wettable Flanks
      9. 7.3.9 Integrated Damping Resistor and Impedance Matching
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 Solving Power Sequencing Challenges with the TXV0108-Q1
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGY|24
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.7 Supports Timing Sensitive Translation

The TXV0108-Q1 can support high data rate applications. The translated signal data rate can support up to 500Mbps when the signal is translated from 1.65V to 3.6V. For the device to meet RGMII 2.0 timing specifications (rise or fall time, skew, and duty cycle distortion) the data rate will need to be lowered to 250Mbps.