SLVS010X january   1976  – june 2023 UA78L

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics: UA78L02 (Legacy Chip Only)
    6. 6.6  Electrical Characteristics: UA78L033 (New Chip Only)
    7. 6.7  Electrical Characteristics: UA78L05 (Both Legacy and New Chip)
    8. 6.8  Electrical Characteristics: UA78L12 (Both Legacy and New Chip)
    9. 6.9  Electrical Characteristics: UA78L06 (Legacy Chip Only)
    10. 6.10 Electrical Characteristics: UA78L08 (Legacy Chip Only)
    11. 6.11 Electrical Characteristics: UA78L09 (Legacy Chip Only)
    12. 6.12 Electrical Characteristics: UA78L10 (Legacy Chip Only)
    13. 6.13 Electrical Characteristics: UA78L15 (Both Legacy and New Chip)
    14. 6.14 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Current Limit
      2. 7.3.2 Thermal Shutdown
      3. 7.3.3 Dropout Voltage (VDO)
    4. 7.4 Device Functional Modes
      1. 7.4.1 Normal Operation
      2. 7.4.2 Dropout Operation
  9. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input and Output Capacitor Requirements
        2. 8.2.2.2 Power Dissipation (PD)
        3. 8.2.2.3 Estimating Junction Temperature
        4. 8.2.2.4 External Capacitor Requirements
        5. 8.2.2.5 Overload Recovery
        6. 8.2.2.6 Reverse Current
        7. 8.2.2.7 Polarity Reversal Protection
      3. 8.2.3 Application Curves
    3. 8.3 System Examples
      1. 8.3.1 Positive Regulator in Negative Configuration
      2. 8.3.2 Current Limiter Circuit
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Device Support
      1. 9.1.1 Development Support
        1. 9.1.1.1 Evaluation Module
      2. 9.1.2 Device Nomenclature
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • D|8
  • PK|3
  • LP|3
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Electrical Characteristics: UA78L033 (New Chip Only)

at specified junction temperature, VI = 9 V, CIN = 0.33 µF, COUT = 0.1µF and IO = 40 mA (unless otherwise noted)(1)
PARAMETER TEST CONDITIONS (2) MIN TYP MAX UNIT
Output voltage VI = 5.5 V to 20 V, and IO = 1 mA to 40 mA,
TJ = 25°C		 3.26 3.3 3.44 V
VI = 5.5 V to 20 V, and IO = 1 mA to 40 mA,
TJ = -40°C to 125°C		 3.21 3.47
IO = 1 mA to 70 mA,
TJ = -40°C to 125°C		 3.23 3.45
Input voltage regulation VI = 5.5 V to 20 V, and TJ = 25°C 15 25 mV
VI = 6 V to 20 V, and TJ = 25°C 14 27
Ripple rejection VI = 6 V to 20 V, f = 120 Hz, and TJ = 25°C 49 57.5 dB
Output voltage regulation IO = 1 mA to 100 mA, and TJ = 25°C 13.5 28 mV
IO = 1 mA to 40 mA, and TJ = 25°C 4.25 13
Output noise voltage f = 10 Hz to 100 kHz, and TJ = 25°C 85 µV
Dropout voltage TJ = 25°C 1.7 V
Bias current TJ = 25°C 3.53 4.1 mA
TJ = 125°C 4.1
Bias current change VI = 6 V to 20 V, and TJ = -40°C to 125°C 0.675 mA
IO = 1 mA to 40 mA, and TJ = -40°C to 125°C 0.01
(1) Applies to UA78L033
(2) Pulse-testing techniques maintain TJ as close to TA as possible. Thermal effects must be taken into account separately.