SLUS223H April 1997 – October 2024 UC1842 , UC1843 , UC1844 , UC1845 , UC2842 , UC2843 , UC2844 , UC2845 , UC3842 , UC3843 , UC3844 , UC3845
PRODUCTION DATA
Bulk capacitance can consist of one or more capacitors connected in parallel, often with some inductance between the capacitors to suppress differential-mode conducted noise. The value of the input capacitor sets the minimum bulk voltage; setting the bulk voltage lower by using minimal input capacitance results in higher peak primary currents leading to more stress on the MOSFET switch, the transformer, and the output capacitors. Setting the bulk voltage higher by using a larger input capacitor results in higher peak current from the input source and the capacitor is physically larger. Compromising between size and component stresses determines the acceptable minimum input voltage. The total required value for the primary-side bulk capacitance, CIN, is selected based upon the power level of the converter, POUT, the efficiency target, η, the minimum input voltage, VIN(min), and is chosen to maintain an acceptable minimum bulk voltage level, VBULK(min), using Equation 9.
In this equation, VIN(min) is the RMS value of the minimum AC input voltage, 85 VRMS, whose minimum line frequency is denoted as fLINE(min), equal to 47 Hz. Based on the CIN equation, to achieve a minimum bulk voltage of 75 V, assuming 85% converter efficiency, the bulk capacitor must be larger than 126 µF; 180 µF is selected for the design, taking into consideration component tolerances and efficiency estimation.