CL SS |
1 |
2 |
I |
Current limit/soft-start. |
VREF |
2 |
3 |
O |
5.1-V internally generated reference. |
CS- |
3 |
4 |
I |
Inverting input of current sense operational amplifier. |
CS+ |
4 |
5 |
I |
Non-Inverting input of current sense operational amplifier. |
EA+ |
5 |
7 |
I |
Non-Inverting input of error amplifier. |
EA- |
6 |
8 |
I |
Inverting input of error amplifier. |
COMP |
7 |
9 |
O |
Output of error amplifier. |
CT |
8 |
10 |
I |
Timing capacitance. Capacitor connected from CT to ground is charged via current established by RT pin via current mirror. Output pulse dead time is determined by the size of the capacitor during capacitor discharge time. |
RT |
9 |
12 |
I |
Determines oscillator frequency. VREF sources thru RT to create a current which is mirrored to CT pin. |
SYNC |
10 |
13 |
I/O |
Sync pin is an output under normal operation when RT is above 4.1-V sync output high. Sync pin is an input when RT pin is high and CT pin tied low. |
AOUT |
11 |
14 |
O |
Output driver (source/sink). |
GND |
12 |
15 |
— |
Ground connection. |
VC |
13 |
17 |
I |
Gate drive collector supply voltage. Decouple with capacitor. |
BOUT |
14 |
18 |
O |
Output driver (source/sink). |
VIN |
15 |
19 |
I |
Input voltage decouple with capacitor. |
SHUTDOWN |
16 |
20 |
I |
Shutdown threshold 350 mV. Voltage above threshold latches off oscillator. |
NC |
— |
1, 6, 11 |
— |
No connect. |